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參數(shù)資料
| 型號(hào)： | SLA 24C32 |
| 廠商： | SIEMENS AG |
| 元件分類： | DRAM |
| 英文描述： | 32 Kbit (4096 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(32K位(4096 ×8 位)串行CMOS-EEPROM(帶有IIC同步2線控制)) |
| 中文描述： | 32千位（4096 × 8位）串行的CMOS EEPROM，帶有國(guó)際進(jìn)口同步2線巴士（32K的位（4096 × 8位）串行的CMOS EEPROM的（帶有國(guó)際進(jìn)口同步2線控制）） |
| 文件頁數(shù)： | 21/28頁 |
| 文件大小： | 368K |
| 代理商： | SLA 24C32 |
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SLx 24C32
Semiconductor Group
21
1999-02-02
7.1
The bits of the protection memory can be addressed directly for reading or programming.
A protection bit address corresponds to the lowest address within the respective page
(A5 to A11, A0 to A4 = zero). The status of each protection bit is sensed internally. A
written state (
“0”) prevents programming in the associated page. If an already protected
memory page is accidentally addressed for programming, the programming procedure
is suppressed.
The conventional
I
2
C-Bus protocol allows data bytes to be read and programmed only.
Therefore an independent instruction sequence for addressing and manipulation of
protection bits is implemented. For protection bit instructions the command byte CSW
with its preceding START condition followed by the associated address bytes have to be
entered twice (
figures 15
through
17
). The first command byte CSW is followed by the
address bytes AHI/ALO with the bit/page address A0 through A4 always at zero. The
second CSW is required for entering a control byte CTx for protection bit manipulation.
The three control bytes for read, write or erase of a protection bit are listed below
(
table 3
):
Protection Bit Handling
Table 3
Control Byte for Protection Bit Manipulation
Address
Name
b7
b6
CTR
x
x
CTW
x
x
CTE
x
x
Definition
b4
x
x
x
Function
b5
x
x
x
b3
x
x
x
b2
x
x
x
b1
0
0
1
b0
0
1
1
Protection bit read
Protection bit write
Protection bit erase
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SLE 24C32 | 32 Kbit (4096 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(32K位(4096 ×8 位)串行CMOS-EEPROM(帶有IIC同步2線控制)) |
| SLA 24C64 | 64 Kbit (8192 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(64K位 (8192 ×8 位)串行CMOS-EEPROM(帶有IIC同步2線控制)) |
| SLE 24C64 | 64 Kbit (8192 ×8 bit) Serial CMOS-EEPROM with IIC Synchronous 2-Wire Bus(64K位 (8192 ×8 位)串行CMOS-EEPROM(帶有IIC同步2線控制)) |
| SLA24C164-D | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLE24C164-D | 16 Kbit 2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SLA24C32-D | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32 Kbit 4096 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C32-D/P | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32 Kbit 4096 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C32-D-3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32 Kbit 4096 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C32-D-3/P | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32 Kbit 4096 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
| SLA24C32-S | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32 Kbit 4096 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus |
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