參數(shù)資料
型號(hào)： SM5905AF
廠商： Seiko NPC Corporation
英文描述： compression and non compression type shock-proof memory controller
中文描述： 壓縮和非壓縮式防震內(nèi)存控制器
文件頁(yè)數(shù)： 6/35頁(yè)
文件大?。?/td> 200K
代理商： SM5905AF
NIPPON PRECISION CIRCUITS-6
SM5905AF
Parameter
Symbol
Condition
System clock
Rating
Typ
29.5
29.5
59
Unit
Min
26
26
56
Max
50
50
100
Clock pulsewidth (HIGH level)
Clock pulsewidth (LOW level)
Clock pulse cycle
t
CWH
t
CWL
t
CY
ns
ns
ns
384fs
CWH
t
CWL
t
CY
t
0.5V
DD
CLK
Parameter
Symbol
Rating
Typ
Unit
Condition
Min
75
75
150
50
50
50
50
0
Max
YSCK pulsewidth (HIGH level)
YSCK pulsewidth (LOW level)
YSCK pulse cycle
YSRDATA setup time
YSRDATA hold time
Last YSCK rising edge to YLRCK edge
YLRCK edge to first YSCK rising edge
t
BCWH
t
BCWL
t
BCY
t
DS
t
DH
t
BL
t
LB
ns
ns
ns
ns
ns
ns
ns
3fs
Memory system ON
(MSON=H)
Memory system OFF
(MSON=L)
YLRCK pulse frequency
See note below.
fs
fs
Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input
data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode
operation.
YSCK
YSRDATA
YLRCK
BCY
t
DS
t
DH
t
BCWH
t
BCWL
t
LB
t
BL
t
0.5V
DD
0.5V
DD
0.5V
DD
Serial input (YSRDATA, YLRCK, YSCK pins)
AC characteristics
Standard voltage: V
DD1
= V
DD2
= 4.5 to 5.5 V, V
SS
= 0 V, Ta = - 40 to 85 C
(*) Typical values are for fs = 44.1 kHz
System clock (CLK pin)
System clock input
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相關(guān)代理商/技術(shù)參數(shù)
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