參數(shù)資料
型號： SM59264Ihhk
廠商： Electronic Theatre Controls, Inc.
英文描述： 8 - Bit Micro-controller
中文描述： 8 -位微控制器
文件頁數(shù)： 10/32頁
文件大?。?/td> 579K
代理商： SM59264IHHK
May 2002
Specifications subject to change without notice,contact your sales representatives for the most recent information.
10/32 Ver 1.0 PID 59264 05/02
SyncMOS Technologies Inc. SM59264
1.4 Data Flash - ($0000 to $FFFF)
SM59264 has 64K byte on-chip data flash embedded. The 64KB on-chip data flash can be read by direct external
addressing mode (by MOVX instruction) which means user does not need to care about 17th flash address bit (FA16). To
read 64KB on-chip data flash is similar to read 64KB external RAM. However, to write (program) data flash is much differ-
ent from to read data flash. User need to use SyncMOS proprietary ISP function, such as byte program/chip erase/page
erase/protect, to the data flash. To do ISP function to data flash need to set FAU0 bit of ISPC ($F7) at first. User has to
recognize 64K program ROM flash and 64KB data flash as combined one single 128KB flash area for ISP function. 64K
byte data flash resides on top of the 64K byte program ROM flash. Please see ISP function description on page 14 for
detail.
Read data flash:
Using direct external addressing mode (by instruction MOVX). Reading on-chip data flash will
be the same as reading external RAM with MOVX instruction.
For example, MOVX A, @DPTR or MOVX A, @Ri ; i=0,1
instruction with 16-bit addressing space.
Write data flash:
Using ISP ‘byte program’ function will have to set the FAU0 bit at first.
Erase data flash:
Including ISP ‘chip erase’ function and ‘page erase’ function. When using ‘chip erase’ function, it
will erase all the 64K byte data flash plus 64K byte program ROM flash except the ISP service
program space if lock bit ‘N’ been configured.
Chip protect flash: Using ISP ‘chip protect’ function will protect the 64K byte data flash plus 64K byte program ROM
flash from read out. Once flash been protected, the content read will be all ‘00’.
For ‘byte program’ and ‘page erase’ flash-address-dependent ISP functions, user need to specify the FAU0 bit (=FA16) of
ISPC ($F7) at first for doing with data flash space. The 64K data flash also can be programmed or erased on writer.
1.4.1 Second Data Pointer Register - RCON ($85) and MOVX @Ri, i=1,2 with read function
Using RCON register with MOVX @Ri, i=0,1 instruction enables SM59264 has second Data Pointer Register (DPTR) with
read function only. The content of RCON register determines high byte address of 64KB data flash while content of MOVX
@Ri instruction determines low byte address. This feature similar to DPH and DPL register of MOVX @ DPTR instruction
but with read function only. Using MOVX @Ri instruction to write data to the data flash will have no effect.
Internal RAM Control Register (RCON, $85)
RAMS[7:0] setting will map on-chip RAM and/or data flash space by pages which accessed by MOVX @Ri
instruction, i=0,1
The address space of instruction MOVX @Ri is determined by RAMS[7:0] of RCON. The default setting of RAMS[7:0] is
00H (page 0).
bit-7
bit-0
Read:
Write:
Reset value:
RAMS7
RAMS6
RAMS5
RAMS4
RAMS3
RAMS2
RAMS1
RAMS0
0
0
0
0
0
0
0
0
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