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參數(shù)資料
| 型號： | SMK2-67025EV-45SB |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | Static RAM |
| 英文描述： | 8K X 16 DUAL-PORT SRAM, 45 ns, QFP84 |
| 封裝： | MQFP-84 |
| 文件頁數(shù)： | 20/23頁 |
| 文件大?。?/td> | 355K |
| 代理商： | SMK2-67025EV-45SB |
M67025E
Rev. G – July 6, 2000
6
The semaphore must use a WRITE/READ sequence in
order to ensure that no system level conflict will occur. A
processor requests access to shared resources by
attempting to write a zero to a semaphore location. If the
semaphore is already in use, the semaphore request latch
will contain a zero, yet the semaphore flag will appear as
a one, and the processor will detect this status in the
subsequent read (see table 5). For example, assume a
processor writes a zero to the left port at a free semaphore
location. On a subsequent read, the processor will verify
that it has written successfully to that location and will
assume control over the resource concerned. If a
processor on the right side then attempts to write a zero
to the same semaphore flag it will fail, as will be verified
by a subsequent read returning a one from the semaphore
location on the right side has a READ/WRITE sequence
been used instead, system conflict problems could have
occurred during the interval between the read and write
cycles.
It must be noted that a failed semaphore request needs to
be followed by either repeated reads or by writing a one
to the same location. The simple logic diagram for the
semaphore flag in figure 2 illusrates the reason for this
quite clearly. Two semaphore request latches feed into a
semaphore flag. The first latch to send a zero to the
semaphore flag will force its side of the semaphore flag
low and other side high. This status will be maintained
until a one is written to the same semaphore request latch.
Sould a zero be written to the other side’s semaphore
request latch in the meantime, the semaphore flag will flip
over to this second side as soon as a one is written to the
first side’s request latch. The second side’s flag will now
stay low until its semaphore request latch is changed to a
one. Thus, clearly, if a semaphore flag is requested and the
processor requesting it no longer requires access to the
resource, the entire system can hang up until a one is
written to the semaphore request latch concerned.
Semaphore timing becomes critical when both sides
request the same token by attempting to write a zero to it
at the same time. Semaphore logic is specially conceived
to resolve this problem. The logic ensures that only one
side will receive the token if simultaneous requests are
made. The first side to make a request will receive the
token where request do not arrive at the same time. Where
they do arrive at the same time, the logic will assign the
token arbitrarily to one of the ports. It should be noted,
however, that semaphores alone do not guarantee that
access to a resource is secure. As with any powerful
programming technique, errors can be introduced if
semaphores are misused or misinterpreted. Code integrity
is of the utmost performance when semaphores are being
used instead of slower, more restrictive hardware-intensive
systems.
Semaphore initialization is not automatic and must
therefore be incorporated in the power up initialization
procedures. Since any semaphore flag containing a zero
must be reset to one, initialization should write a one to
all request flags from both sides to ensure that they will
be available when required.
Using Semaphores - Some Examples
Perhaps the simplest application of semaphores is their
use as resource markers for the M67025E’s dual-port
RAM. If it is necessary to split the 8 k
× 16 RAM into two
4 K
× 16 blocks which are to be dedicated to serving either
the left or right port at any one time. Semaphore 0 can be
used to indicate which side is controlling the lower
segment of memory and semaphore 1 can be defined as
indicating the upper segment of memory.
To take control of a resource, in this case the lower 4 k of
a dual-port RAM, the left port processor would then write
a zero into semaphore flag 0 and then read it back. If
successful in taking the token (reading back a zero rather
than a one), the left processor could then take control of
the lower 4 k of RAM. If the right processor attempts to
perform the same function to take control of the resource
after the left processor has already done so, it will read
back a one in response to the attempted write of a zero into
semaphore 0. At this point the software may choose to
attempt to gain control of the second 4 k segment of RAM
by writing and then reading a zero in semaphore 1. If
successful, it will lock out the left processor.
Once the left side has completed its task it will write a one
to semaphore 0 and may then attempt to access
semaphore 1. If semaphore 1 is still occupied by the right
side, the left side may abandon its semaphore request and
perform other operations until it is able to write and then
read a zero in semaphore 1. If the right processor
performs the same operation with semaphore 0, this
protocol would then allow the two processes to swap 4 k
blocks of dual-port RAM between one another.
The blocks do not have to be any particular size, and may
even be of variable size depending on the complexity of
the software using the semaphore flags. All eight
semaphores could be used to divide the dual-port RAM or
other shared resources into eight parts. Semaphores can
even be assigned different meanings on each side, rather
than having a common meaning as is described in the
above example.
Semaphores are a useful form of arbitration in systems
such as disk interfaces where the CPU must be locked out
of a segment of memory during a data transfer operation,
and the I/0 device cannot tolerate any wait states. If
semaphores are used, both the CPU and the I/0 device can
access assigned memory segments, without the need for
wait states, once the two devices have determined which
memory area is barred to the CPU.
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