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    參數(shù)資料
    型號(hào): SMP04ESZ
    廠商: Analog Devices Inc
    文件頁數(shù): 5/15頁
    文件大?。?/td> 0K
    描述: IC AMP SAMPLE HOLD CMOS 16SOIC
    標(biāo)準(zhǔn)包裝: 48
    放大器類型: 采樣和保持
    電路數(shù): 4
    轉(zhuǎn)換速率: 4 V/µs
    電流 - 輸入偏壓: 500nA
    電壓 - 輸入偏移: 2500µV
    電流 - 電源: 4mA
    電流 - 輸出 / 通道: 1.2mA
    電壓 - 電源,單路/雙路(±): 5 V ~ 12 V,±2.5 V ~ 6 V
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
    供應(yīng)商設(shè)備封裝: 16-SOIC
    包裝: 管件
    產(chǎn)品目錄頁面: 768 (CN2011-ZH PDF)
    SMP04
    –13–
    REV. D
    D/A CONVERTER DEGLITCHER
    Most D/A converters output an appreciable amount of glitch
    energy during a transition from one code to another. The glitch
    amplitude can range from several millivolts to hundreds of milli-
    volts. This may become unacceptable in many applications. By
    selectively delaying the DAC’s output transition, the SMP04
    can be used to smooth the output waveform. Figure 25 shows
    the schematic diagram of such a deglitcher circuit. Two simple
    logic gates (an OR and a NAND gate) provide the proper timing
    sequence for the DAC
    WR strobe and the S/H control signal to
    the SMP04. In this example a linear ramp signal is generated by
    feeding the most significant eight bits of the 10-bit binary
    counter to the DAC. The two least significant bits are used to
    produce the delayed
    WR strobe and the S/H control signals.
    Referring to Figure 26a, new data to the DAC input is set up at
    the
    S/H’s falling edge, but the DAC output does not change
    until a
    WR strobe goes active. During this period, the SMP04 is
    in a sample mode whose output tracks the DAC output. When
    S/H goes HIGH, the current DAC output voltage is held by the
    SMP04. After 1.2
    s settling, the WR strobe goes LOW to allow
    the DAC output to change. Any glitch that occurs at the DAC
    output is effectively blocked by the SMP04. As soon as the
    WR
    strobe goes HIGH, the digital data is latched; at the same time
    the
    S/H goes LOW, allowing the SMP04 to track to the new
    DAC output voltage.
    Figure 26b shows the deglitching operation. The top trace
    shows the DAC output during a transition, while the bottom
    trace shows the deglitched output of the SMP04.
    1/4 SMP04
    10-BIT
    COUNTER
    CLOCK
    GENERATOR
    DB2–DB9
    DB0
    DEGLITCH LOGIC
    1/4 AD7432
    1/4 AD7400
    A1
    A0
    VDD
    VREF
    OUT
    DAC C
    OUT
    1/4 DAC8426
    VSS
    AGND
    DGND WR
    +5V
    +15V
    1 F
    AGND
    0.1 F
    0.1 F–1 F CERAMIC
    VOUT
    +15V
    DGND
    S/H
    DB9
    DB2
    VDD
    VSS
    LSB
    MSB
    VIN
    DIGITAL
    RETURN
    ANALOG
    RETURN
    DB1
    Figure 25. DAC Deglitcher
    1 s
    5V
    DB0
    DB1
    WR
    S/H
    a.
    1 s
    50m
    DLY
    627.4 s
    b.
    Figure 26. (a) Shows the Logic Timing of the Deglitcher.
    The Top Two Traces Are the Two Least Significant Bits,
    DB0 and DB1, Respectively. These Are Used to Generate
    the
    WR and S/H Signals Which Are Shown in the Bottom
    Two Traces. (b) Shows the Typical Glitch Amplitude of a
    DAC (Top Trace) and the Deglitched Output of the AMP04
    (Bottom Trace).
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    SMP04ESZ 制造商:Analog Devices 功能描述:Sample & Hold Amplifier
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    SMP-04V-NC 制造商:JST Manufacturing 功能描述:Conn Housing PL 4 POS Crimp ST Bag 制造商:JST Manufacturing 功能描述:CONNECTOR HOUSING PLUG 4 WAY PLASTIC 制造商:JST Manufacturing 功能描述:CONNECTOR HOUSING, PLUG, 4 WAY, PLASTIC 制造商:JST Manufacturing 功能描述:2.5mm Wire to Wire connector, Natural colour Plug Housing 制造商:JST Manufacturing 功能描述:Connector 制造商:JST Manufacturing 功能描述:CONNECTOR, HOUSING, PLUG, 4POS, 1ROW, Product Range:JST - SM Series, Contact Termination:-, Gender:Plug, No. of Contacts:4, No. of Rows:1, Pitch Spacing:2.5mm, Contact Plating:-, Contact Material:-, Connector Type:Wire to Board , RoHS Compliant: Yes 制造商:JST Manufacturing 功能描述:CONNECTOR HOUSING, PLUG, 4 WAY, PLASTIC, Series:SM, No. of Positions:4, Pitch Sp