參數(shù)資料
型號: SN54ABT126
廠商: Texas Instruments, Inc.
英文描述: Quadruple Bus Buffer Gates With 3-State Outputs(四總線緩沖門(三態(tài)輸出))
中文描述: 四人間總線緩沖器門,三態(tài)輸出(四總線緩沖門(三態(tài)輸出))
文件頁數(shù): 1/6頁
文件大?。?/td> 138K
代理商: SN54ABT126
SN54ABT126, SN74ABT126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCBS183C – FEBRUARY 1991 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce) < 1 V
at V
CC
= 5 V, T
A
= 25
°
C
High-Impedance State During Power Up
and Power Down
High-Drive Outputs (–32-mA I
OH
, 64-mA I
OL
)
Package Options Include Plastic
Small-Outline (D) and Shrink Small-Outline
(DB) Packages, Ceramic Chip Carriers (FK),
and Plastic (N) and Ceramic (J) DIPs
description
The
independent line drivers with 3-state outputs.
Each output is disabled when the associated
output-enable (OE) input is low.
’ABT126
bus
buffer
gates
feature
When V
CC
is between 0 and 2.1 V, the device is
in the high-impedance state during power up or
power
down.
However,
high-impedance state above 2.1 V, OE should be
tied to V
CC
through a pullup resistor; the minimum
value of the resistor is determined by the
current-sinking capability of the driver.
to
ensure
the
The SN54ABT126 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74ABT126 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
H
A
H
H
H
L
L
L
X
Z
Copyright
1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-
ΙΙ
B
is a trademark of Texas Instruments Incorporated.
SN54ABT126 . . . J PACKAGE
SN74ABT126 . . . D, DB, OR N PACKAGE
(TOP VIEW)
SN54ABT126 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3OE
3A
3Y
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1
1
N
3
3
V
4
2
G
N
NC – No internal connection
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