參數(shù)資料
型號: SN54ABT651FKR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28
封裝: CERAMIC, LCC-28
文件頁數(shù): 6/13頁
文件大小: 255K
代理商: SN54ABT651FKR
SN54ABT651, SN74ABT651
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS083E – JANUARY 1991 – REVISED APRIL 1998
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The SN54ABT651 is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74ABT651 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
DATA I/O
OPERATION OR FUNCTION
OEAB
OEBA
CLKAB
CLKBA
SAB
SBA
A1–A8
B1–B8
OPERATION OR FUNCTION
L
H
H or L
X
Input
Isolation
L
H
↑↑
X
Input
Store A and B data
X
H
H or L
X
Input
Unspecified
Store A, hold B
H
↑↑
X
Input
Output
Store A in both registers
L
X
H or L
X
Unspecified
Input
Hold A, store B
L
↑↑
XX
Output
Input
Store B in both registers
L
X
L
Output
Input
Real-time B data to A bus
L
X
H or L
X
H
Output
Input
Stored B data to A bus
H
X
L
X
Input
Output
Real-time A data to B bus
H
H or L
X
H
X
Input
Output
Stored A data to B bus
H
L
H or L
H
Output
Stored A data to B bus and
stored B data to A bus
The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions are always
enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs.
When select control is low, clocks can occur simultaneously if allowances are made for propagation delays from A to B (B to A) plus setup and
hold times. When select control is high, clocks must be staggered to load both registers.
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