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參數(shù)資料
| 型號： | SN54ABTH16260 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 12-Bit to 24-Bit Multiplexed D-Type Latches(12-24多路復(fù)用D鎖存器(三態(tài)輸出)) |
| 中文描述： | 12位至24位復(fù)用D類閥門（12-24多路復(fù)用?鎖存器（三態(tài)輸出）） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 172K |
| 代理商： | SN54ABTH16260 |
SN54ABT16260, SN74ABTH16260
12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS204C – JUNE 1992 – REVISED MAY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
When V
CC
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ABT16260 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74ABTH16260 is characterized for operation from –40
°
C to 85
°
C.
Function Tables
B TO A (OEB = H)
INPUTS
OUTPUT
A
1B
2B
SEL
LE1B
LE2B
OEA
H
X
H
H
X
L
H
L
X
H
H
X
L
L
X
X
H
L
X
L
A0
H
X
H
L
X
H
L
X
L
L
X
H
L
L
X
X
L
X
L
L
A0
Z
X
X
X
X
X
H
A TO B (OEA = H)
INPUTS
OUTPUTS
A
LEA1B
LEA2B
OE1B
OE2B
1B
2B
H
H
H
L
L
H
H
L
H
H
L
L
L
L
H
H
L
L
L
H
2B0
2B0
H
L
H
L
L
L
L
H
L
H
L
L
1B0
1B0
1B0
Z
L
L
H
L
L
L
X
L
L
L
L
2B0
Z
X
X
X
H
H
X
X
X
L
H
Active
Z
X
X
X
H
L
Z
Active
X
X
X
L
L
Active
Active
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