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參數(shù)資料
| 型號： | SN54AC573W |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| 中文描述： | 八路?- 3型透明鎖存態(tài)輸出 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 121K |
| 代理商： | SN54AC573W |
SN54AC573, SN74AC573
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS542B - OCTOBER 1995 – REVISED NOVEMBER 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Outputs Drive Bus Lines Directly
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D Inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the high-imped-
ance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in a bus-organized system without need for
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54AC573 is characterized for operation over the full military temperature range of –55 C to 125 C.
The SN74AC573 is characterized for operation from –40 C to 85 C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
D
H
H
L
H
L
L
L
L
X
Q0
Z
H
X
X
Copyright
1996, Texas Instruments Incorporated
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54AC573 . . . J OR W PACKAGE
SN74AC573 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2
1
O
8
7
1
8
G
L
V
C
SN54AC573 . . . FK PACKAGE
(TOP VIEW)
相關PDF資料 |
PDF描述 |
|---|---|
| SN74AC574DB | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574FK | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574J | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574W | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN74AC74DB | Dual Low-Voltage CMOS 2-of-4 Decoder/Demultiplexer; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN54AC574 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC574W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AC74 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET |
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