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參數(shù)資料
| 型號： | SN54AHCT165 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8-Bit Parallel-Load Shift Registers(8位并行載入移位寄存器) |
| 中文描述： | 8位并行負載移位寄存器（8位并行載入移位寄存器） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 181K |
| 代理商： | SN54AHCT165 |
SN54AHCT165, SN74AHCT165
8-BIT PARALLEL-LOAD SHIFT REGISTERS
SCLS372 – MAY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
FUNCTION
SH/LD
L
CLK
CLK INH
X
X
Parallel load
H
H
X
No change
H
X
H
↑
L
No change
Shift
Shift
H
L
↑
H
Shift = content of each internal register shifts
toward serial output QH. Data at SER is
shifted into the first register.
logic symbol
SRG8
C1 [LOAD]
1
15
CLK INH
2
CLK
14
D
2D
10
SER
1D
11
A
1D
12
B
13
C
3
E
4
F
5
G
1D
6
H
C2/
7
9
≥
1
SH/LD
QH
QH
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
logic diagram (positive logic)
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
1
15
2
10
SH/LD
CLK INH
CLK
SER
9
7
QH
QH
11
12
13
14
3
4
5
6
A
B
C
D
E
F
G
H
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
P
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