參數(shù)資料
型號: SN54LS175
廠商: Motorola, Inc.
英文描述: QUAD D FLIP-FLOP
中文描述: 四D觸發(fā)器
文件頁數(shù): 2/5頁
文件大小: 171K
代理商: SN54LS175
5-328
FAST AND LS TTL DATA
SN54/74LS175
FUNCTIONAL DESCRIPTION
The LS175 consists of four edge-triggered D flip-flops with
individual D inputs and Q and Q outputs. The Clock and
Master Reset are common. The four flip-flops will store the
state of their individual D inputs on the LOW to HIGH Clock
(CP) transition, causing individual Q and Q outputs to follow. A
LOW input on the Master Reset (MR) will force all Q outputs
LOW and Q outputs HIGH independent of Clock or Data
inputs.
The LS175 is useful for general logic applications where a
common Master Reset and Clock are acceptable.
TRUTH TABLE
Inputs (t = n, MR = H)
Outputs (t = n+1) Note 1
D
Q
Q
L
H
L
H
H
L
Note 1: t = n + 1 indicates conditions after next clock.
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
–55
0
25
25
125
70
°
C
IOH
IOL
Output Current — High
54, 74
–0.4
mA
Output Current — Low
54
74
4.0
8.0
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
74
0.8
VIK
Input Clamp Diode Voltage
–0.65
–1.5
V
VCC = MIN, IIN = –18 mA
VOH
Output HIGH Voltage
54
2.5
3.5
V
or VIL per Truth Table
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
VOL
Output LOW Voltage
54, 74
0.25
0.4
V
IOL = 4.0 mA
VCC = VCC MIN,
per Truth Table
74
0.35
0.5
V
IOL = 8.0 mA
VIN = VIL or VIH
IIH
Input HIGH Current
20
μ
A
VCC = MAX, VIN = 2.7 V
VCC = MAX, VIN = 7.0 V
VCC = MAX, VIN = 0.4 V
VCC = MAX
VCC = MAX
0.1
mA
IIL
IOS
ICC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Input LOW Current
–0.4
mA
Short Circuit Current (Note 1)
–20
–100
mA
Power Supply Current
18
mA
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