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參數(shù)資料
| 型號(hào)： | SN54LS259 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Octal Bidirectional Transceiver with 3-State Inputs/Outputs; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 8位可尋址鎖存 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 217K |
| 代理商： | SN54LS259 |
E
C
MODE
L
H
L
H
H
H
L
L
Addressable Latch
Memory
Active HIGH Eight-Channel
Demultiplexer
Clear
MODE SELECTION
X = Don’t Care Condition
L = LOW Voltage Level
H = HIGH Voltage Level
QN–1 = Previous Output State
5-434
FAST AND LS TTL DATA
SN54/74LS259
LOGIC DIAGRAM
FUNCTIONAL DESCRIPTION
The SN54/74LS259 has four modes of operation as shown
in the mode selection table. In the addressable latch mode,
data on the Data line (D) is written into the addressed
latch.The addressed latch will follow the data input with all
non-addressed latches remaining in their previous states. In
the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs.
In the one-of-eight decoding or demultiplexing mode, the
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs are
LOW and unaffected by the address and data inputs.
When operating the SN54/74LS259 as an addressable
latch, changing more then one bit of the address could impose
a transient wrong address. Therefore, this should only be
done while in the memory mode.
The truth table below summarizes the operations.
TRUTH TABLE
PRESENT OUTPUT STATES
C E D A0
L H X
L L L
L L H
L L L
L L H
L L H
A1
X
L
L
L
L
H
A2
X
L
L
L
L
Q0
L
L
H
L
L
Q1
L
L
L
L
H
Q2
L
L
L
L
L
Q3
L
L
L
L
L
L
Q4
L
L
L
L
L
Q5
L
L
L
L
L
Q6
L
L
L
L
L
Q7
L
L
L
L
L
MODE
X
L
L
H
H
Clear
Demultiplex
H
H
L
L
L
L
L
L
H
H H X
X
X
X
QN–1
L
H
QN–1
QN–1
Memory
H I
H L H
H L L
H L H
H L L
H L H
I
L
L
H
H
L
L
L
L
H
H
L
L
L
L
QN–1
QN–1
L
H
QN–1
QN–1
QN–1
QN–1
QN–1
Addressable
Latch
H
H
H
H
QN–1
QN–1
QN–1
QN–1
L
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54LS259J | Octal Bidirectional Transceiver with 3-State Inputs/Outputs; Package: SOIC-20 WB; No of Pins: 20; Container: Tape and Reel; Qty per Container: 1000 |
| SN74LS259D | 8-BIT ADDRESSABLE LATCH |
| SN74LS259N | 8-BIT ADDRESSABLE LATCH |
| SN54LS279 | 8-Bit Addressable Latch; Package: SOEIAJ-16; No of Pins: 16; Container: Rail; Qty per Container: 50 |
| SN74LS279D | QUAD SET-RESET LATCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| SN54LS259BW | 制造商:Texas Instruments 功能描述: |
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| SN54LS275J | 制造商:Texas Instruments 功能描述: |
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