參數(shù)資料
型號： SN54LS352J
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Dual D-Type Positive Edge Trigger; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500
中文描述： LS SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, CDIP16
封裝： CERAMIC, DIP-16
文件頁數(shù)： 3/5頁
文件大小： 160K
代理商： SN54LS352J
5-507
FAST AND LS TTL DATA
SN54/74LS352
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
74
0.8
VIK
Input Clamp Diode Voltage
–0.65
–1.5
V
VCC = MIN, IIN = –18 mA
VOH
Output HIGH Voltage
54
2.5
3.5
V
or VIL per Truth Table
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
VOL
Output LOW Voltage
54, 74
0.25
0.4
V
IOL = 4.0 mA
VCC = VCC MIN,
per Truth Table
74
0.35
0.5
V
IOL = 8.0 mA
VIN = VIL or VIH
IIH
Input HIGH Current
20
μ
A
VCC = MAX, VIN = 2.7 V
VCC = MAX, VIN = 7.0 V
VCC = MAX, VIN = 0.4 V
VCC = MAX
VCC = MAX
0.1
mA
IIL
IOS
ICC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Input LOW Current
–0.4
mA
Short Circuit Current (Note 1)
–20
–100
mA
Power Supply Current
10
mA
AC CHARACTERISTICS
(TA = 25
°
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
tPLH
tPHL
Propagation Delay,
Select to Output
19
25
29
38
ns
Figure 1 or 2
CL = 15 pF
tPLH
tPHL
Propagation Delay,
Enable to Output
16
21
24
32
ns
Figure 2
VCC = 5.0 V,
tPLH
tPHL
Propagation Delay,
Data to Output
13
17
20
26
ns
Figure 1
Figure 1
Figure 2
AC WAVEFORMS
相關(guān)PDF資料
PDF描述
SN74LS352 DUAL 4-INPUT MULTIPLEXER
SN74LS352D DUAL 4-INPUT MULTIPLEXER
SN74LS352N DUAL 4-INPUT MULTIPLEXER
SN54LS367J Quad 2-Input NAND Gate; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500
SN54LS365J Quad 2-Input Exclusive OR Gate; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500
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