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參數(shù)資料
| 型號(hào)： | SN55ALS056 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Trapezoidal-Waveform Interface Bus Transceivers(梯形波形接口總線收發(fā)器) |
| 中文描述： | 梯形波形接口總線收發(fā)器（梯形波形接口總線收發(fā)器） |
| 文件頁(yè)數(shù)： | 17/19頁(yè) |
| 文件大?。?/td> | 460K |
| 代理商： | SN55ALS056 |
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SN55ALS056, SN55ALS057, SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028E – AUGUST 1987 – REVISED MAY 1995
2–17
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT
Bus Logic
Low Level
tw is increased until the output voltage
fall just reaches 2 V.
High Level
Bus Logic
tw is increased until the output voltage rise
just reaches 0.8 V.
VOLTAGE WAVEFORMS
1.25 V
2 V
1.55 V
tw(NR)
tw(NR)
1.55 V
V1
1.85 V
1.1 V
(An, Rn)
5 V
VO
SN75ALS057
or
SN75ALS056
VI(Bn)
RL1
RL2
CL (includes jig capacitance)
NOTE: tr = tf
≤
2 ns from 10% to 90%
Figure 6. Receiver Noise Immunity Test Circuit and Voltage Waveforms
TEST CIRCUIT
VOLTAGE WAVEFORMS
tPHL5
1.5 V
1.5 V
tPLH5
1.5 V
1.5 V
VO(Rn)
0
3 V
VI(Dn)
VI(Dn)
50 pF
2 V
18
(Rn)
5 V
VO
SN55ALS057
(Bn)
500
RL1
RL2
CL (includes jig capacitance)
NOTE: tr = tf
≤
5 ns from 10% to 90%
Figure 7. Driver Plus Receiver Delay Times Test Circuits and Voltage Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
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| SN55ALS160 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS |
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| SN55ALS161 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS |
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