參數(shù)資料
型號(hào)： SN65LVDS9637BDG4
廠商： TEXAS INSTRUMENTS INC
元件分類： Buffer和線驅(qū)動(dòng)
英文描述： DUAL LINE RECEIVER, PDSO8
封裝： 1.27 MM PITCH, GREEN, SOIC-8
文件頁(yè)數(shù)： 1/22頁(yè)
文件大?。?/td> 358K
代理商： SN65LVDS9637BDG4
www.ti.com
FEATURES
DESCRIPTION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
VCC
4B
4A
4Y
G
3Y
3A
3B
SN65LVDT32B
1
2
3
4
8
7
6
5
VCC
1Y
2Y
GND
1A
1B
2A
2B
D PACKAGE
(TOP VIEW)
D PACKAGE
(TOP VIEW)
SN65LVDS32B
G
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
Logic Diagram
(positive logic)
SN65LVDT32B
ONLY (4 Places)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
VCC
4B
4A
4Y
3,4EN
3Y
3A
3B
SN65LVDT3486B
D PACKAGE
(TOP VIEW)
SN65LVDS3486B
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
Logic Diagram
(positive logic)
SN65LVDT3486B
ONLY (4 Places)
1,2EN
3,4EN
1A
1B
2A
2B
1Y
2Y
SN65LVDT9637B
ONLY
SN65LVDT9637B
SN65LVDS9637B
Logic Diagram
(positive logic)
SLLS440B – OCTOBER 2000 – REVISED APRIL 2007
HIGH-SPEED DIFFERENTIAL RECEIVERS
Meets or Exceeds the Requirements of ANSI
EIA/TIA-644 Standard for Signaling Rates (1) up
to 400 Mbps
Operates With a Single 3.3-V Supply
–2-V to 4.4-V Common-Mode Input Voltage
Range
Differential Input Thresholds <50 mV With
50 mV of Hysteresis Over Entire Common-
Mode Input Voltage Range
Integrated 110- Line Termination Resistors
Offered With the LVDT Series
Propagation Delay Times 4 ns (typ)
Active Fail Safe Assures a High-Level Output
With No Input
Bus-Pin ESD Protection Exceeds 15 kV HBM
Inputs Remain High-Impedance on Power
Down
Recommended Maximum Parallel Rate of
200 M-Transfer/s
Available in Small-Outline Package With
1,27-mm Terminal Pitch
Pin-Compatible With the AM26LS32, MC3486,
or A9637
This
family
of
differential
line
receivers
offers
improved performance and features that implement
the electrical characteristics of low-voltage differential
signaling
(LVDS).
LVDS
is
defined
in
the
TIA/EIA-644 standard. This improved performance
represents
the
second
generation
of
receiver
products for this standard, providing a better overall
solution for the cabled environment. This generation
of products is an extension to TI's overall product
portfolio and is not necessarily a replacement for
older LVDS receivers.
(1)
Signaling rate, 1/t, where t is the minimum unit interval and is
expressed in the units bit/s (bits per second).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2000–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN65LVDS9637BDR 功能描述:LVDS 接口集成電路 Dual LVDS RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SN65LVDS9637BDRG4 功能描述:LVDS 接口集成電路 Dual LVDS Receiver RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SN65LVDS9637D 功能描述:LVDS 接口集成電路 Dual HS Diff RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SN65LVDS9637DG4 功能描述:LVDS 接口集成電路 DUAL LVDS RECEIVER RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SN65LVDS9637DGK 功能描述:LVDS 接口集成電路 Dual HS Diff RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
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