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參數(shù)資料
| 型號： | SN74ABT16543DGG |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.300 INCH, PLASTIC, TSSOP-56 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 228K |
| 代理商： | SN74ABT16543DGG |
Product Folder: SN54ABT16543, 16-Bit Registered Transceivers With 3-State Outputs
Keyword
Part Number
PRODUCT SUPPORT: TRAINING
SN54ABT16543, 16-Bit Registered Transceivers With 3-State Outputs
DEVICE STATUS: ACTIVE
PARAMETER NAME SN54ABT16543 SN74ABT16543
Voltage Nodes (V) 5
5
Vcc range (V)
4.5 to 5.5
Input Level
TTL
Output Level
TTL
Output Drive (mA)
-32/64
No. of Outputs
16
Logic
True
Static Current
18.5
th (ns)
2
tpd max (ns)
5.1
tsu (ns)
3.5
FEATURES
q
Members of the Texas Instruments WidebusTM Family
q
State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
q
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
q
Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
q
Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
q
Flow-Through Architecture Optimizes PCB Layout
q
High-Drive Outputs (-32-mA IOH, 64-mA IOL)
q
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center
Spacings
Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
DESCRIPTION
The 'ABT16543 16-bit registered transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. The 'ABT16543 can be used as two 8-bit transceivers or one 16-bit
transceiver. Separate latch-enable (
or
) and output-enable (
or
) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (
) input must be low to enter data from A or to output data from B. If
is low and
is low, the A-to-B latches are transparent; a subsequent low-to-high transition of
puts the A latches in the storage mode. With
and
both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar
but requires using the
,
, and
inputs.
file:///G|/imaging/BITTING/CPL/20030422/04212003_9/TXII/042120003_HTML/sn54abt16543.html (1 of 3) [24-Apr-03 11:08:48 AM]
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ABT16543DGGR | 功能描述:總線收發(fā)器 Tri-St. 16-Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ABT16543DL | 功能描述:總線收發(fā)器 16bit w/ Tri-St Out RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ABT16543DLG4 | 功能描述:總線收發(fā)器 16-Bit Registered Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ABT16543DLR | 功能描述:總線收發(fā)器 Tri-State 16-Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ABT16543DLRG4 | 功能描述:總線收發(fā)器 16-Bit Registered Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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