參數(shù)資料
型號: SN74ABT646ADB
廠商: Texas Instruments, Inc.
元件分類: 通用總線功能
英文描述: OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUPUTS
中文描述: 八路總線收發(fā)器和寄存器具有三態(tài)OUPUTS
文件頁數(shù): 2/21頁
文件大?。?/td> 478K
代理商: SN74ABT646ADB
SCBS069H JULY 1991 REVISED MAY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information(continued)
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the
transceiver mode, data present at the high-impedance port can be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The
direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high),
A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function still is enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
相關(guān)PDF資料
PDF描述
SN54ABT646AJT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUPUTS
SN54ABT646AW OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUPUTS
SN54ABT646 Octal Bus Transceivers and Registers With 3-State Outputs(八總線收發(fā)器/寄存器(三態(tài)輸出))
SN54ABT648 Octal Bus Transceivers and Registers With 3-State Outputs(八總線收發(fā)器和寄存器(三態(tài)輸出))
SN74ABT648 Octal Bus Transceivers and Registers With 3-State Outputs(八總線收發(fā)器和寄存器(三態(tài)輸出))
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