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參數(shù)資料
| 型號： | SN74LS190N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | axial lead glass packaged PIN diodes |
| 中文描述： | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 310K |
| 代理商： | SN74LS190N |
5-346
FAST AND LS TTL DATA
SN54/74LS190
SN54/74LS191
AC CHARACTERISTICS
(TA = 25
°
C)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
fMAX
tPLH
tPHL
Maximum Clock Frequency
20
25
MHz
CL = 15 pF
Propagation Delay,
PL to Output Q
22
33
33
50
ns
VCC = 5.0 V
tPLH
tPHL
Data to Output Q
20
27
32
40
ns
tPLH
tPHL
Clock to RC
13
16
20
24
ns
tPLH
tPHL
Clock to Output Q
16
24
24
36
ns
tPLH
tPHL
Clock to TC
28
37
42
52
ns
tPLH
tPHL
U/D to RC
30
30
45
45
ns
tPLH
tPHL
U/D to TC
21
22
33
33
ns
tPLH
tPHL
CE to RC
21
22
33
33
ns
AC SETUP REQUIREMENTS
(TA = 25
°
C)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
tW
CP Pulse Width
25
ns
VCC = 5.0 V
tW
ts
th
trec
PL Pulse Width
35
ns
Data Setup Time
20
ns
Data Hold Time
5.0
ns
Recovery Time
40
ns
DEFINITIONS OF TERMS
SETUP TIME (ts) is defined as the minimum time required for
the correct logic level to be present at the logic input prior to the
clock transition from LOW-to-HIGH in order to be recognized
and transferred to the outputs.
HOLD TIME (th) is defined as the minimum time following the
clock transition from LOW-to-HIGH that the logic level must be
maintained at the input in order to ensure continued recogni-
tion. A negative HOLD TIME indicates that the correct logic
level may be released prior to the clock transition from LOW-
to-HIGH and still be recognized.
RECOVERY TIME (trec) is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH data to the Q outputs.
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| SN74LS191N | PRESETTABLE BCD/DECADE UP/DOWN COUNTERS PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS |
| SN54LS195J | UNIVERSAL 4-BIT SHIFT REGISTER |
| SN54LSXXXJ | UNIVERSAL 4-BIT SHIFT REGISTER |
| SN74LSXXXD | UNIVERSAL 4-BIT SHIFT REGISTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS191D | 功能描述:計數(shù)器 IC 4-Bit Sync Up/Down RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS191DE4 | 功能描述:計數(shù)器 IC 4-Bit Sync Up/Down RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS191DG4 | 功能描述:計數(shù)器 IC Sync 4B Up Down Counters RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS191DR | 功能描述:計數(shù)器 IC 4-Bit Sync Up/Down RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS191DRE4 | 功能描述:計數(shù)器 IC 4-Bit Sync Up/Down RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
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