參數(shù)資料
型號(hào)： SN74LS256N
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： >6V Fixed Gain Amp, High Gain, Minimum Feedback
中文描述： LS SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16
封裝： PLASTIC, DIP-16
文件頁數(shù)： 4/6頁
文件大?。?/td> 225K
代理商： SN74LS256N
5-424
FAST AND LS TTL DATA
SN54/74LS256
AC SET-UP REQUIREMENTS
(TA = 25
°
C)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
ts
ts
th
th
tW
Data Setup Time
20
ns
Figures 4 & 6
VCC = 5.0 V
Address Setup Time
0
ns
Data Hold Time
0
ns
Figure 4
Address Hold Time
15
ns
Figure 6
Enable Pulse Width
15
ns
Figure 1
Figure 1. Turn-on and Turn-off Delays, Enable To
Output and Enable Pulse Width
Figure 4. Setup and Hold Time, Data to Enable
Figure 2. Turn-on and Turn-off Delays,
Data to Output
Figure 3. Turn-on and Turn-off Delays,
Address to Output
Figure 5. Turn-on Delay, Clear to Output
Figure 6. Setup Time, Address to Enable
(See Notes 1 and 2)
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
addressed and the other latches are not affected.
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
AC WAVEFORMS
相關(guān)PDF資料
PDF描述
SN54LS259 Octal Bidirectional Transceiver with 3-State Inputs/Outputs; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500
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