參數(shù)資料
型號: SN74LS259D
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: 8-BIT ADDRESSABLE LATCH
中文描述: LS SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO16
封裝: SOIC-16
文件頁數(shù): 4/6頁
文件大小: 217K
代理商: SN74LS259D
5-436
FAST AND LS TTL DATA
SN54/74LS259
Figure 1. Turn-on and Turn-off Delays, Enable To
Output and Enable Pulse Width
Figure 4. Setup and Hold Time, Data to Enable
Figure 2. Turn-on and Turn-off Delays,
Data to Output
Figure 3. Turn-on and Turn-off Delays,
Address to Output
Figure 5. Turn-on Delay, Clear to Output
Figure 6. Setup Time, Address to Enable
(See Notes 1 and 2)
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
addressed and the other latches are not affected.
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
AC WAVEFORMS
相關(guān)PDF資料
PDF描述
SN74LS259N 8-BIT ADDRESSABLE LATCH
SN54LS279 8-Bit Addressable Latch; Package: SOEIAJ-16; No of Pins: 16; Container: Rail; Qty per Container: 50
SN74LS279D QUAD SET-RESET LATCH
SN74LS279N QUAD SET-RESET LATCH
SN54LS279J Octal D-Type Flip-Flop; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38
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