- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376410 > SN74LS322DW (Motorola, Inc.) 8-BIT SHIFT REGISTERS WITH SIGN EXTEND PDF資料下載
參數(shù)資料
| 型號： | SN74LS322DW |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-BIT SHIFT REGISTERS WITH SIGN EXTEND |
| 中文描述： | 8位移位寄存器帶符號擴展 |
| 文件頁數(shù)： | 4/4頁 |
| 文件大?。?/td> | 113K |
| 代理商： | SN74LS322DW |
5-4
FAST AND LS TTL DATA
SN54/74LS322A
AC CHARACTERISTICS
(TA = 25
°
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
fMAX
tPHL
tPLH
Maximum Clock Frequency
25
35
MHz
CL = 15 pF
Propagation Delay, Clock
to QH
′
26
22
35
33
ns
tPHL
Propagation Delay, Clear
to QH
′
27
35
ns
tPHL
tPLH
Propagation Delay, Clock
to QA–QH
22
16
33
25
ns
RL = 667
tPHL
Propagation Delay, Clear
to QA–QH
22
35
ns
CL = 45 pF,
tPZH
tPZL
Output Enable Time
15
15
35
35
ns
tPHZ
tPLZ
Output Disable Time
15
15
25
25
ns
CL = 5.0 pF
AC SETUP REQUIREMENTS
(TA = 25
°
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Min
Typ
Max
tW
tW
tW
ts
ts
Clock Pulse Width HIGH
25
ns
VCC = 5.0 V
Clock Pulse Width LOW
15
ns
Clear Pulse Width LOW
20
ns
Data Setup Time
20
ns
Select Setup Time
15
ns
th
th
trec
Data Hold Time
0
ns
Select Hold Time
10
ns
Recovery Time
20
ns
DEFINITIONS OF TERMS
SETUP TIME (ts) — is defined as the minimum time required
for the correct logic level to be present at the logic input prior to
the clock transition from LOW-to-HIGH in order to be recog-
nized and transferred to the outputs.
HOLD TIME (th) — is defined as the minimum time following
the clock transition from LOW-to-HIGH that the logic level
must be maintained at the input in order to ensure continued
recognition. A negative HOLD TIME indicates that the correct
logic level may be released prior to the clock transition from
LOW-to-HIGH and still be recognized.
RECOVERY TIME (trec) — is defined as the minimum time
required between the end of the reset pulse and the clock
transition from LOW-to-HIGH in order to recognize and
transfer HIGH Data to the Q outputs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LS322N | 500mA, 12V,±2% Tolerance, Voltage Regulator, Ta = 0°C to +125°C; Package: TO-220, SINGLE GAUGE; No of Pins: 3; Container: Rail; Qty per Container: 50 |
| SN54LS352 | Dual D-Type Positive Edge Trigger; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LS352J | Dual D-Type Positive Edge Trigger; Package: SOIC 14 LEAD; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| SN74LS352 | DUAL 4-INPUT MULTIPLEXER |
| SN74LS352D | DUAL 4-INPUT MULTIPLEXER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS323DW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS323DWR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS323N | 制造商:Motorola Inc 功能描述: 制造商:ON Semiconductor 功能描述: 制造商:Texas Instruments 功能描述: |
| SN74LS323N3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS32D | 功能描述:邏輯門 Quad 2-input Positive-OR gates RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。