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參數(shù)資料
| 型號(hào)： | SN74LS623DW |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT |
| 中文描述： | LS SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 1/3頁(yè) |
| 文件大?。?/td> | 70K |
| 代理商： | SN74LS623DW |
GAB
A1
A2
B2
B1
TO OTHER SIX
TRANSCEIVERS
GBA
BLOCK DIAGRAM
1/4 LS623
5-1
FAST AND LS TTL DATA
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUT
The SN54/74LS623 series is an octal bus transceiver designed for
asynchronous two-way communication between data buses. Control function
implementation allows maximum timing flexibility. Enable inputs may be used
to disable the device so that buses are effectively isolated. Depending on the
Logic Levels at the enable inputs, Data transmission is allowed from the A bus
to the B bus or from the B bus to the A bus. The dual-enable configuration
gives the LS623 the capability to store data by simultaneous enabling of GBA
and GAB. Each output reinforces its input in this transceiver configuration.
Thus, when both control inputs are enabled all other data sources to the two
sets of bus lines (16 in all) will remain at their last states.
CONNECTION DIAGRAM
(TOP VIEW)
18
17
16
15
14
13
1
2
3
4
A3
5
6
7
A6
20
19
8
A7
VCC
ENABLE
GAB
ENABLE
GBA
B1
B2
B3
B5
B4
B6
A1
A2
A4
A5
9
10
GND
A8
12
11
B7
B8
FUNCTION TABLE
ENABLE INPUTS
OPERATION
GBA
GAB
LS623
L
L
B data to A bus
H
H
A data to B bus
H
L
Isolation
L
H
B data to A bus,
A data to B bus
H = HIGH Level, L = LOW Level, X = Irrelevant
SN54/74LS623
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUT
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXDW SOIC
Ceramic
Plastic
20
1
J SUFFIX
CERAMIC
CASE 732-03
20
1
N SUFFIX
PLASTIC
CASE 738-03
20
1
DW SUFFIX
SOIC
CASE 751D-03
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54LS623 | Octal Buffer/Line Driver with 3-State Outputs; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LS623J | Octal Buffer/Line Driver with 3-State Outputs; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500 |
| SN74LS623N | OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT |
| SN74LS669D | SYNCHRONOUS 4-BIT UP/DOWN COUNTER |
| SN74LS669N | SYNCHRONOUS 4-BIT UP/DOWN COUNTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS623DWE4 | 功能描述:總線收發(fā)器 Octal bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LS623DWG4 | 功能描述:總線收發(fā)器 Octal bus transceivr RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LS623DWR | 功能描述:總線收發(fā)器 Octal bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LS623DWRE4 | 功能描述:總線收發(fā)器 Octal bus Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LS623DWRG4 | 功能描述:總線收發(fā)器 Octal bus transceivr RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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