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參數(shù)資料
| 型號(hào)： | SN74LVC137A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3-Line To 8-Line Decoder/Demultiplexer With Address Latches |
| 中文描述： | 具有地址鎖存器的 3 線路至 8 線路解碼器/多路解復(fù)用器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 110K |
| 代理商： | SN74LVC137A |
SN74LVC137A
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
WITH ADDRESS LATCHES
SCAS340C – MARCH 1994 – REVISED JANUARY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Inputs Accept Voltages to 5.5 V
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
This 3-line to 8-line decoder/demultiplexer with latches on three address inputs is designed for 2.7-V to 3.6-V
V
CC
operation.
The SN74LVC137A is designed for high-performance memory-decoding or data-routing applications requiring
very short propagation delay times. In high-performance memory systems, this decoder can be used to
minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable
circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access
time of the memory. This means that the effective system delay introduced by the decoder is negligible.
When the latch-enable (G2A) input is low, the SN74LVC137A acts as a decoder/demultiplexer. When G2A
transitions from low to high, the address present at the inputs (A, B, and C) is stored in the latches. Further
address changes are ignored, provided G2A remains high. The output-enable (G1 and G2B) inputs control the
outputs independently of the select or latch-enable inputs. All of the outputs are forced high if G1 is low or G2B
is high.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN74LVC137A is characterized for operation from –40
°
C to 85
°
C.
Copyright
1997, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
D, DB, OR PW PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVC138AD | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Line Decoder RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADB | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| SN74LVC138ADBR | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Line Decoder RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADBRE4 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3-Line to 8-Line Decoder/Demltplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADBRG4 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3 Ln To 8 Ln Decodr Demultplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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