參數(shù)資料
型號: SN74LVC2G32YZAR
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, BGA8
封裝: GREEN, MO-211EB, DSBGA-8
文件頁數(shù): 1/13頁
文件大小: 384K
代理商: SN74LVC2G32YZAR
www.ti.com
FEATURES
Seemechanicaldrawingsfordimensions.
DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
1
V
CC
8
1A
2
7
1B
1Y
3
6
2Y
2B
4
5
GND
2A
3
6
2B
2Y
8
1
V
CC
1A
5
GND
4
2A
2
7
1Y
1B
GND
5
4
2A
3 6
2B
2Y
2 7
1Y
1B
8
V
CC
1
1A
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOMVIEW)
DESCRIPTION/ORDERING INFORMATION
The SN74LVC2G32 performs the Boolean function Y + A ) B or Y + A B in positive logic.
DUAL 2-INPUT POSITIVE-OR GATE
SCES201K – APRIL 1999 – REVISED SEPTEMBER 2006
Available in the Texas Instruments
Typical V
OHV (Output VOH Undershoot)
NanoStar and NanoFree Packages
>2 V at V
CC = 3.3 V, TA = 25°C
Supports 5-V V
CC Operation
I
off Supports Partial-Power-Down Mode
Operation
Inputs Accept Voltages to 5.5 V
Latch-Up Performance Exceeds 100 mA Per
Max t
pd of 3.8 ns at 3.3 V
JESD 78, Class II
Low Power Consumption, 10-
A Max I
CC
ESD Protection Exceeds JESD 22
±24-mA Output Drive at 3.3 V
– 2000-V Human-Body Model (A114-A)
Typical V
OLP (Output Ground Bounce)
– 200-V Machine Model (A115-A)
<0.8 V at V
CC = 3.3 V, TA = 25°C
– 1000-V Charged-Device Model (C101)
This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74LVC2G32YEAR
0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)
SN74LVC2G32YZAR
0.17-mm Small Bump – YZA (Pb-free)
Reel of 3000
_ _ _CG_
NanoStar – WCSP (DSBGA)
SN74LVC2G32YEPR
0.23-mm Large Bump – YEP
–40
°C to 85°C
NanoFree – WCSP (DSBGA)
SN74LVC2G32YZPR
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000
SN74LVC2G32DCTR
C32_ _ _
Reel of 3000
SN74LVC2G32DCUR
VSSOP – DCU
C32_
Reel of 250
SN74LVC2G32DCUT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1999–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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