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參數(shù)資料
| 型號： | SN74LVTH162374GQLR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉16位邊沿觸發(fā)的D型倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 589K |
| 代理商： | SN74LVTH162374GQLR |
www.ti.com
PARAMETER MEASUREMENT INFORMATION
t
h
t
su
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT
S1
6 V
GND
500
500
Data Input
Timing Input
2.7 V
0 V
2.7 V
0 V
2.7 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
2.7 V
0 V
Input
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
V
OL
+ 0.3 V
V
OH
0.3 V
≈
0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
6 V
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, Z
O
= 50
, t
r
≤
2.5 ns, t
f
≤
2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Open
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
SN54LVTH162374
,
SN74LVTH162374
3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS262M–JULY 1993–REVISED NOVEMBER 2006
Figure 1. Load Circuit and Voltage Waveforms
7
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