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參數(shù)資料
| 型號(hào)： | SNJ54LV540AJ |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁(yè)數(shù)： | 12/21頁(yè) |
| 文件大?。?/td> | 752K |
| 代理商： | SNJ54LV540AJ |
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SN54LV540A, SN74LV540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS409H APRIL 1998 REVISED APRIL 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These devices are ideal for driving bus lines or buffer memory address registers. They feature inputs and
outputs on opposite sides of the package to facilitate printed circuit board layout.
The 3-state control gate is a two-input AND gate with active-low inputs so that, if either output
enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state. The outputs
provide inverted data when they are not in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
OE1
OE2
A
OUTPUT
Y
L
H
L
LH
L
H
XX
Z
X
H
X
Z
logic diagram (positive logic)
OE1
OE2
To Seven Other Channels
A1
Y1
1
19
2
18
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