參數(shù)資料
型號(hào): SP208EEA
英文描述: +5V High Performance RS232 Transceivers
中文描述: 5V的高性能RS232收發(fā)器
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 160K
代理商: SP208EEA
SP207EDS/09
SP207E Series High Performance RS232 Transceivers
6
Copyright 2000 Sipex Corporation
Figure 2. Charge Pump — Phase 2
Figure 3. Charge Pump Waveforms
+10V
a) C
2
+
GND
GND
b) C
2
–10V
Phase 4
— V
transfer — The fourth phase of the clock
connects the negative terminal of C
to ground,
and transfers the generated l0V across C
to C
4
,
the V
storage capacitor. Again, simultaneously
with this, the positive side of capacitor C
is
switched to +5V and the negative side is
connected to ground, and the cycle begins again.
Since both V
+
and V
are separately generated
from V
; in a no–load condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1
μ
F with a 16V breakdown
voltage rating.
Transmitter/Driver
The drivers are inverting transmitters, which
accept either TTL or CMOS inputs and output the
RS-232 signals with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +9V with no load, and +5V
minimum with full load. The transmitter outputs
are protected against infinite short–circuits to
ground without degradation in reliability. The
drivers of the
SP211E
,
and
SP213E
can be
tri–stated by using the SHUTDOWN function.
In the “power-off” state, the output impedance will
remain greater than 300 ohms, again satisfying the
RS-232 specifications. Should the input of the
driver be left open, an internal 400Kohm pullup
resistor to V
forces the input high, thus committing
the output to a low state. The slew rate of the
transmitter output is internally limited to a
maximum of 30V/
μ
s in order to meet the EIA
standards (EIA RS-232D 2.1.7, Paragraph 5). The
transition of the loaded output from high to low
also meets the monotonicity requirements of the
standard.
V
CC
= +5V
–10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
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