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| 型號： | SP211HET |
| 英文描述： | RES NET ISOLATED 82K OHM 16-DIP |
| 中文描述： | 5V的高速RS - 232收發(fā)器 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 216K |
| 代理商： | SP211HET |
5
TGoddard/SP207H/9614R0
SP207H/SP211H High–Speed Transceivers
Copyright 2000 Sipex Corporation
Figure 2. Charge Pump — Phase 2
negative side of capcitor C
. There is a free–
running oscillator that controls the four phases
of the voltage shifting. A description of each
phase follows.
Phase 1
— V
charge storage —During this phase of the
clock cycle, the positive side of capacitors C
1
and C
are initially charged to +5V. C
switched to ground and the charge in C
transferred to C
+5V, the voltage potential across capacitor C
2
is
now 10V.
+
is then
–
is
–
. Since C
+
is connected to
Phase 2
— V
transfer — Phase two of the clock con-
nects the negative terminal of C
to the V
SS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V to
C
. Simultaneously, the positive side of capaci-
tor C
is switched to +5V and the negative side
is connected to ground.
Phase 3
— V
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
produces –5V in the negative
terminal of C
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at +5V, the
voltage potential across C
2
is l0V.
Phase 4
— V
transfer — The fourth phase of the clock
connects the negative terminal of C
to ground,
and transfers the generated l0V across C
to C
4
,
the V
storage capacitor. Again, simultaneously
with this, the positive side of capacitor C
is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Since both V
+
and V
–
are separately generated
from V
; in a no–load condition V
+
and V
–
will
be symmetrical. Older charge pump approaches
that generate V
–
from V
+
will show a decrease in
the magnitude of V
–
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1
μ
F with a 16V breakdown
voltage rating.
Transmitter/Driver
The drivers are inverting transmitters which have
been improved for speed over the
SP200 Series
.
The transmitters accept either TTL or CMOS
inputs and output the RS-232 signals at data rates
over 400kbps. Typically, the RS-232 output volt
V
CC
= +5V
–5V
–5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
–
–
–
–
Figure 1. Charge Pump — Phase 1
V
CC
= +5V
–10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
–
–
–
–
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