Rev. 06/20/02
SP202E Series High Performance RS232 Transceivers
Copyright 2002 Sipex Corporation
5
The instantaneous slew rate of the transmitter
output is internally limited to a maximum of 30V/
μ
s in order to meet the standards [EIA RS-232-D
2.1.7, Paragraph (5)]. However, the transition re-
gion slew rate of these enhanced products is typi-
cally 10V/
μ
s. The smooth transition of the loaded
output from V
to V
clearly meets the mono-
tonicity requirements of the standard [EIA
RS-232-D 2.1.7, Paragraphs (1) & (2)].
Receivers
The receivers convert RS-232 input signals to
inverted TTL signals. Since the input is usually
from a transmission line, where long cable lengths
and system interference can degrade the signal, the
inputs have a typical hysteresis margin of 500mV.
This ensures that the receiver is virtually immune
to noisy transmission lines.
The input thresholds are 0.8V minimum and 2.4V
maximum, again well within the
±
3V RS-232
requirements. The receiver inputs are also pro-
tected against voltages up to
±
15V. Should an
input be left unconnected, a 5KOhm pulldown
resistor to ground will commit the output of the
receiver to a high state.
R
2
20
19
R IN
2
R OUT
R
1
3
4
R IN
1
R OUT
T
2
1
18
T IN
2
T OUT
T
1
2
5
T IN
1
T OUT
9
GND
400k
400k
T
R
14
13
C +
1
C -
V-
V-
V+
1
11
7
V
CC
+5V INPUT
12
T
R
5k
5k
17
10
C +
2
C +
2
C -
2
C -
2
GND
6
8
15
16
Do not make
cothese pins
Internal
-10V Power
Supply
Internal
+10V Power
Supply
SP233ECT
R
2
20
19
R IN
2
R OUT
R
1
3
4
R IN
1
R OUT
T
2
1
18
T IN
2
T OUT
T
1
2
5
T IN
1
T OUT
9
GND
400k
400k
T
R
13
8
C +
1
C -
V-
V-
V+
1
10
7
V
CC
+5V INPUT
11
T
R
5k
5k
17
12
C +
2
C +
2
C -
2
C -
2
GND
6
14
15
16
Do not make
connection to
these pins
Internal
-10VSupply
Internal
+10VSupply
SP233ECP
Figure 2. Typical Circuits using the SP233ECP and SP233ECT
R
2
10
9
R IN
2
R OUT
R
1
13
14
R IN
1
R OUT
T
2
11
8
T IN
2
T OUT
T
1
12
15
T IN
1
T OUT
16
GND
400k
400k
T
R
4
5
2
C +
1
C -
1
7
17
V
CC
V+
+
+
0.1 F
6.3V
μ
+5V to +10V
Voltage Doubler
+5V INPUT
3
V-
T
R
5k
5k
6
C +
2
C -
2
+
0.1 F
16V
μ
+10V to -10V
Voltage Inverter
10 F 6.3V
SP310E
+
18
ON/OFF
+
0.1
μ
F
16V
*
*The negative terminal of the V+ storage capacitor can be tied
CC
or GND. Connecting the capacitor to V
CC
(+5V)
to either V
0.1
μ
F
16V
R
2
10
9
R IN
2
R OUT
R
1
13
14
R IN
1
R OUT
T
2
11
8
T IN
2
T OUT
T
1
12
15
T IN
1
T OUT
16
GND
400k
400k
T
R
4
5
2
C +
1
C -
1
7
17
V
CC
V+
+
+
0.1 F
6.3V
μ
+5V to +10V
Voltage Doubler
+5V INPUT
3
V-
T
R
5k
16V
μ
5k
6
C +
2
C -
2
+
0.1 F
16V
μ
+10V to -10V
Voltage Inverter
10 F 6.3V
SP312E
+
18
SHUTDOWN
1
EN
+
0.1 F
16V
μ
*
*The negative terminal of the V+ storage capacitor can be tied
or GND. Connecting the capacitor to V
CC
(+5V)
is recommended.
Figure 3. Typical Circuits using the SP310E and SP312E