參數(shù)資料
型號(hào): SP3243ECA
元件分類: RS-232
英文描述: 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
中文描述: 5V的高速RS - 232收發(fā)器與0.1uF電容
文件頁(yè)數(shù): 19/25頁(yè)
文件大小: 279K
代理商: SP3243ECA
19
Date: 6/2/04
SP3223EB/3243EB +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
DEVICE PIN
TESTED
HUMAN BODY
MODEL Air Discharge Direct Contact Level
IEC1000-4-2
Driver Outputs
Receiver Inputs
±
15kV
±
15kV
±
15kV
±
15kV
±
8kV
±
8kV
4
4
R
S
R
V
f
f
R
S
and
R
V
add up to 330
for IEC1000-4-2.
Contact-Discharge Module
R
R
V
V
R
V
R
R
C
C
C
C
S
S
R
R
S
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
The circuit model in
Figures 29
and
30
represent
the typical ESD testing circuit used for all three
methods. The C
S
is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through R
S
, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (R
S
) and the source capacitor (C
S
) are
1.5k
an 100pF, respectively. For IEC-1000-4-
2, the current limiting resistor (R
S
) and the source
capacitor (C
S
) are 330
an 150pF, respectively.
The higher C
S
value and lower R
S
value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
Figure 32. ESD Test Waveform for IEC1000-4-2
t=0ns
t=30ns
0A
15A
30A
t
i
Figure 31. ESD Test Circuit for IEC1000-4-2
Table 4. Transceiver ESD Tolerance Levels
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