參數(shù)資料
型號: SP3243EEA
英文描述: 12-Bit, 4-Channel Serial Output Sampling Analog-to-Digital Converter 16-SSOP/QSOP
中文描述: 智能3.0V至5.5V的RS - 232收發(fā)器
文件頁數(shù): 13/25頁
文件大小: 279K
代理商: SP3243EEA
13
Date: 6/2/04
SP3223EB/3243EB +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
Since both V
+
and V
are separately generated
from V
CC
, in a no–load condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
Figure 20. AUTO ON-LINE
Timing Waveforms
RECEIVER
RS-232 INPUT
VOLTAGES
STATUS
+5V
0V
-5V
t
STSL
t
STSH
t
ONLINE
V
CC
0V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
+2.7V
-2.7V
S
H
U
T
D
O
W
N
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1
μ
F with a 16V breakdown
voltage rating.
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