參數(shù)資料
型號: SP331ET
元件分類: RS-232
英文描述: 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
中文描述: 5V的高速RS - 232收發(fā)器與0.1uF電容
文件頁數(shù): 8/13頁
文件大?。?/td> 169K
代理商: SP331ET
SP331DS/13
SP331 RS-232/RS-485 Serial Transceiver
8
Copyright 2000 Sipex Corporation
THEORY OF OPERATION
The
SP331
is made up of four separate circuit
blocks — the charge pump, drivers, receivers,
and decoder. Each of these circuit blocks is
described in more detail below.
Charge–Pump
The charge pump is a
Sipex
–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 10V
power supplies.
Figure 15(a)
shows the
waveform found on the positive side of capcitor
C2, and
Figure 15(b)
shows the negative side of
capcitor C2. There is a free–running oscillator
that controls the four phases of the voltage
shifting. A description of each phase follows.
Phase 1
— V
charge storage —During this phase of
the clock cycle, the positive side of capacitors
C
and C
are initially charged to +5V. C
l
then switched to ground and charge on C
transferred to C
2
+
is
is
. Since C
2
+
is connected to
FUNCTION TABLE FOR SELECT PINS
A
B
C
D
MODE
RS-232
RS-232
RS-232
RS-232
FUNCTION
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
All four RS-232 drivers active
All four RS-232 drivers tri-state
All four RS-232 drivers tri-state
RS-232 (4ch) Loopback
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
RS-232/RS-485
RS-232/RS-485
RS-232/RS-485
RS-232/RS-485
T1 and T2 active RS-232; T3 tri-state RS-485
T1 and T2 tri-state RS-232; T3 active RS-485
T1 and T2 active RS-232; T3 tri-state RS-485
RS-232 (2ch) / RS-485 (1ch) Loopback
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
RS-485/RS-232
RS-485/RS-232
RS-485/RS-232
RS-485/RS-232
T1 active RS-485; T2 and T3 active RS-232
T1 tr-state RS-485; T3 active RS-232; T4 active RS232
All RS-485 and RS-232 drivers tri-state
RS-485 (1ch) / RS-232 (2ch) Loopback
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
RS-485
RS-485
RS-485
RS-485
T1 and T3 active RS-485
T1 tri-state RS-485; T3 active RS-485
T1 active RS-485; T3 tri-state RS-485
RS-485 (2ch) Loopback
+5V, the voltage potential across capacitor C
2
is now 10V.
Phase 2
— V
transfer — Phase two of the clock con-
nects the negative terminal of C
to the V
SS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V to
C
. Simultaneously, the positive side of capaci-
tor C
is switched to +5V and the negative side
is connected to ground.
Phase 3
— V
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
produces –5V in the negative
terminal of C
, which is applied to the negative
side of capacitor C
. Since C
voltage potential across C
2
is l0V.
+
is at +5V, the
Phase 4
— V
transfer — The fourth phase of the
clock connects the negative terminal of C
to
ground and transfers the generated l0V across
C
2
to C
4
, the V
DD
storage capacitor. Again,
Table 1. Mode Function Table. (Refer to Control Logic Confirmations for Block Diagrams)
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