參數(shù)資料
型號(hào): SP488ET
英文描述: Quad RS-485/RS-422 Line Receivers
中文描述: 四RS-485/RS-422收發(fā)線接收器
文件頁(yè)數(shù): 4/6頁(yè)
文件大?。?/td> 81K
代理商: SP488ET
SP488/489
Quad RS-485/RS-422 Line Receivers
4
Copyright 2000 Sipex Corporation
Pin 13 — RO
— Receiver 4 Output — If
Receiver 4 output is enabled, if RI
A > RI
B by
200mV, Receiver 4 output is high. If Receiver 4
output is enabled, and if RI
A < RI
4
B by
200mV, Receiver 4 output is low.
Pin 14 — RI
4
A
— Receiver 4 input A.
Pin 15 — RI
4
B — Receiver 4 input B.
Pin 16 — Supply Voltage V
CC
— 4.75V
V
CC
5.25V.
SP489 PINOUT
Pin 1 — RI
1
B — Receiver 1 input B.
Pin 2 — RI
1
A —
Receiver 1 input A.
Pin 3 — RO
Receiver 1 Output — If Re-
ceiver 1 output is enabled, if RI
> RI
B by
200mV, Receiver output is high. If Receiver 1
output is enabled, and if RI
1
A
< RI
1
B
by 200mV,
Receiver 1 output is low.
Pin 4 — EN1/EN2 — Receiver 1 and 2 Output
Enable. Please refer to SP489
Truth Table (2)
.
Pin 5 — RO
— Receiver 2 Output — If Re-
ceiver 2 output is enabled, if RI
A > RI
B by
200mV, Receiver 2 output is high. If Receiver 2
output is enabled, and if RI
A < RI
2
B by
200mV, Receiver 2 output is low.
Pin 6 — RI
2
A — Receiver 2 input A.
Pin 7 — RI
2
B — Receiver 2 input B.
Pin 8 — GND — Digital Ground.
DIFFERENTIAL
A – B
ENABLES
OUTPUT
RO
EN
EN
V
ID
0.2V
H
X
X
L
H
H
–0.2V < V
ID
< +0.2V
H
X
X
L
X
X
V
ID
0.2V
H
X
X
L
L
L
X
L
H
Hi–Z
Table 1. SP488 Truth Table
Pin 9 — RI
3
B — Receiver 3 input B.
Pin 10 — RI
3
A —
Receiver 3 input A.
Pin 11 — RO
— Receiver 3 Output — If
Receiver 3 output is enabled, if RI
A > RI
B by
200mV, Receiver 3 output is high. If Receiver 3
output is enabled, and if RI
A < RI
3
B by
200mV, Receiver 3 output is low.
Pin 12 — EN3/EN4 — Receiver 3 and 4 Output
Enable. Please refer to SP489 Truth Table (2).
Pin 13 — RO
— Receiver 4 Output — If
Receiver 4 output is enabled, if RI
A > RI
B by
200mV, Receiver 4 output is high. If Receiver 4
output is enabled, and if RI
A < RI
4
B by
200mV, Receiver 4 output is low.
Pin 14 — RI
4
A
— Receiver 4 input A.
Pin 15 — RI
4
B — Receiver 4 input B.
Pin 16 — Supply Voltage V
CC
— 4.75V
V
CC
5.25V.
Table 2. SP489 Truth Table
DIFFERENTIAL
A – B
ENABLES
EN
1
/EN
2
or EN
3
/EN
4
OUTPUT
RO
V
ID
0.2V
H
H
–0.2V < V
ID
< +0.2V
H
X
V
ID
0.2V
H
L
X
L
Hi–Z
FEATURES…
The
SP488
and
SP489
are low–power quad
differential line receivers meeting RS-485 and
RS-422 standards. The
SP488
features active
high and active low common receiver enable
controls; the
SP489
provides independent, ac-
tive high receiver enable controls for each pair
of receivers. Both feature tri–state outputs and a
-7V to +12V common–mode input range per-
mitting a
±
7V ground difference between de-
vices on the communications bus. The
SP488/
489
are equipped with a fail–safe feature which
forces a logic high at the receiver output when
the input is left floating. Data rates up to 10Mbps
are supported. Both are available in 16-pin
plastic DIP and SOIC packages.
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