SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers
Copyright 2000 Sipex Corporation
6
P
Table 2. SP489A Truth Table
DIFFERENTIAL
A – B
ENABLES
EN
1
/EN
2
or EN
3
/EN
4
OUTPUT
RO
V
ID
≥
0.2V
H
H
–0.2V < V
ID
< +0.2V
H
X
V
ID
≤
0.2V
H
L
X
L
Hi–Z
FEATURES…
The
SP488A
and
SP489A
are low–power quad
differential line receivers meeting RS-485 and
RS-422 serial protocol. The
SP488A
and
SP489A
feature
Sipex's
BiCMOS process
allowing low power operational characteristics
of CMOS technology while meeting all of the
demands of the RS-485 and RS-422 serial
protocols over 10Mbps under load in harsh
environments. In fact, the
SP488A
and
SP489A
can transmit signals up to 30Mbps.
The RS-485 standard is ideal for multi-drop
applications and for long-distance communica-
tion. RS-485 allows up to 32 drivers and 32
receivers to be connected to a data bus, making
it an ideal choice for multi-drop applications.
Since the cabling can be as long as 4,000 feet,
RS-485 transceivers are equipped with a wide
(-7V to +12V) common mode range to
accommodate ground potential differences.
Because RS-485 is a differential interface,
data is virtually immune to noise in the
transmission line.
DIFFERENTIAL
A – B
ENABLES
OUTPUT
RO
EN
EN
V
ID
≥
0.2V
H
X
X
L
H
H
–0.2V < V
ID
< +0.2V
H
X
X
L
X
X
V
ID
≤
0.2V
H
X
X
L
L
L
X
L
H
Hi–Z
Table 1. SP488A Truth Table
Normally an RS-485 driver will produce no less
than 1.5V before cable attenuation. After cable
loss, the signal may degrade and have an
amplitude of less than 1.0V. The receiver input
sensitivity of the
SP488A
and
SP489A
allows
the devices to receive signals as low as 200mV.
The
SP488A
features active high and active
low common receiver enable controls; the
SP489A
provides independent, active high
receiver enable controls for each pair of
receivers. Both feature tri–state outputs and
a -7V to +12V common–mode input range
permitting a
±
7V ground difference between
devices on the communications bus. The
SP488A/489A
are equipped with a fail–safe
feature which forces a logic high at the
receiver output when the input is left floating.
Both are available in 16-pin plastic DIP and
SOIC packages.