- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372185 > SP503 Multiprotocol Transceiver PDF資料下載
參數(shù)資料
| 型號(hào)： | SP503 |
| 英文描述： | Multiprotocol Transceiver |
| 中文描述： | 多協(xié)議收發(fā)器 |
| 文件頁數(shù)： | 9/29頁 |
| 文件大?。?/td> | 641K |
| 代理商： | SP503 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
9
Date: 7/29/04
SP503 Multiprotocol Transceiver
Copyright 2004 Sipex Corporation
Figure 3. Charge Pump Waveforms
+10V
GND
GND
–10V
C
2
+
C
2
–
a)
b)
V
CC
= +5V
–10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
–
–
–
–
Figure 2. Charge Pump Phase 2.
and RS-423 drivers. For the RS-232 driver, the
current requirement will be 3.5mA per driver,
and for the RS-423 driver, the worst case current
drain will be 11mA per driver. The external
power supplies should provide a power supply
sequence of : +l0V, then +5V, followed by –l0V
.
Drivers
The
SP503
has seven (7) independent drivers,
two of which have separate active–low tri–state
controls. If a half-duplex channel is required,
this can be achieved with external connections.
Control for the mode selection is done via a
four–bit control word. The
SP503
does not have
a latch; the control word must be externally
latched either high or low to write the appropri-
ate code into the
SP503
. The drivers are pre-
arranged such that for each mode of operation
the relative position and functionality of the
drivers are set up to accommodate the selected
interface mode. As the mode of the drivers is
changed, the electrical characteristics will change
to support the requirements of clock, data, and
control line signal levels.
Table 1
shows a sum-
mary of the electrical characteristics of the driv-
ers in the different interface modes. Unused
driver inputs can be left floating; however, to
ensure a desired state with no input signal, pull–
up resistors to +5V or pull–down resistors to
ground are suggested. Since the driver inputs
are both TTL or CMOS compatible, any value
resistor less than 100k
will suffice.
simultaneously with this, the positive side of
capacitor C
is switched to +5V and the negative
side is connected to ground, and the cycle begins
again.
Since both V+ and V
–
are separately generated
from V
in a no–load condition, V+ and V
–
will
be symmetrical. Older charge pump approaches
that generate V
–
from V+ will show a decrease
in the magnitude of V
–
compared to V+ due to
the inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors must
be 22
μ
F with a 16V breakdown rating.
External Power Supplies
For applications that do not require +5V only,
external supplies can be applied at the V+ and
V
–
pins. The value of the external supply volt-
ages must be no greater than
±
l0V. The current
drain for the
±
10V supplies is used for RS-232,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP503AN | Application Note |
| SP503CF | Multiprotocol Transceiver |
| SP503EB | Application Note |
| SP503EF | Multiprotocol Transceiver |
| SP503EM | Multiprotocol Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP503AN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Application Note |
| SP503CF | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Application Note |
| SP503CM-L | 功能描述:總線收發(fā)器 Full Duplex RS-485 s RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SP503EB | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Application Note |
| SP503EF | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Multiprotocol Transceiver |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。