15
Rev. 3/05/04
SP514 Multi–Mode Serial Transceiver
Copyright 2004 Sipex Corporation
PINOUT…
PIN ASSIGNMENTS…
CLOCK AND DATA GROUP
Pin 1 — RxD — Receive Data; TTL output,
sourced from RD(a) and RD(b) inputs.
Pin 14 — TxD — TTL input ; transmit data
source for SD(a) and SD(b) outputs.
Pin 15 — TxC — Transmit Clock; TTL input for
TT driver outputs.
Pin 20 — RxC — Receive Clock; TTL output
sourced from RT(a) and RT(b) inputs.
Pin 22 — ST — Send Timing; TTL input; source
for ST(a) and ST(b) outputs.
Pin 37 — RT(a) — Receive Timing; analog
input, inverted; source for RxC.
Pin 38 — RT(b) — Receive Timing; analog
input, non-inverted; source for RxC.
Pin 42 — ST(a) — Send Timing; analog output,
inverted; sourced from ST.
Pin 44 — ST(b) — Send Timing; analog output,
non-inverted; sourced from ST.
Pin 59 — SD(b) — Analog Out — Send data,
non-inverted; sourced from TxD.
Pin 61 — SD(a) — Analog Out — Send data,
inverted; sourced from TxD.
Pin 63 — TT(a) — Analog Out — Terminal
Timing, inverted; sourced from TxC
Pin 65 — TT(b) — Analog Out — Terminal
Timing, non–inverted; sourced from TxC.
Pin 70 — RD(a) — Receive Data, analog input;
inverted; source for RxD.
Pin 71 — RD(b) — Receive Data; analog input;
non-inverted; source for RxD.
Pin 76 — SCT(a) — Serial Clock Transmit;
analog input, inverted; source for SCT.
Pin 77 — SCT(b) — Serial Clock Transmit:
analog input, non–inverted; source for SCT
Pin 79 — SCT — Serial Clock Transmit; TTL
output; sources from SCT(a) and SCT(b) inputs.
CONTROL LINE GROUP
Pin 13 — DTR — Data Terminal Ready; TTL
input; source for TR(a) and TR(b) outputs.
Pin 16 — RTS — Ready To Send; TTL input;
source for RS(a) and RS(b) outputs.
Pin 17 — RL — Remote Loopback; TTL input;
source for RL(a) and RL(b) outputs.
Pin 18 — V35_STAT — V.35 Status; TTL
output; outputs logic high when in V.35 mode.
Pin 19 — DCD— Data Carrier Detect; TTL
output; sourced from RR(a) and RR(b) inputs.
Pin 21 — RI — Ring Indicate; TTL output;
sourced from IC(a) and IC(b) inputs.
Pin 24 — LL — Local Loopback; TTL input;
source for LL(a) and LL(b) outputs.
Pin 35 — RR(a)— Receiver Ready; analog
input, inverted; source for DCD.
Pin 36 — RR(b)— Receiver Ready; analog
input, non-inverted; source for DCD.
Pin 39 — IC(a)— Incoming Call; analog input,
inverted; source for RI.
RxD 1
RDEC
0
2
RDEC
1
3
RDEC
2
4
RDEC
3
5
TTEN 6
SCTEN 7
N/C 8
TDEC
3
9
TDEC
2
10
TDEC
1
11
TDEC
0
12
DTR 13
TxD 14
TxC 15
RTS 16
RL 17
V35_STAT 18
DCD 19
RxC 20
R
S
S
L
V
C
C
1
+
V
D
C
2
+
G
C
1
–
C
2
–
V
S
V
C
G
R
R
R
R
I
I
60 GND
59 SD(b)
58 TR(a)
57 GND
56 TR(b)
55 V
CC
54 RS(a)
53 GND
52 RS(b)
51 LL(a)
50 GND
49 LL(b)
48 V
CC
47 RL(a)
46 GND
45 RL(b)
44 ST(b)
43 GND
42 ST(a)
41 V
CC
8
7
7
7
7
7
7
C
7
C
7
7
7
6
6
6
6
6
6
6
6
C
6
SP504
SP514