______________________________________________________
GENERAL OVERVIEW
June 26, 2007 SP6127 TSOT-6 PFET Buck Controller
2007 Sipex Corporation
Page 8
Output Capacitor Selection
Select the output capacitor for voltage rating,
capacitance and Equivalent Series Resistance
(ESR). Nominally the voltage rating is selected to
be twice as large as the output voltage. Select
the capacitance to satisfy the specification for
output voltage overshoot/undershoot caused by
current step load. A steady-state output current
I
OUT
corresponds to inductor stored energy of L
I
OUT
2
. A sudden decrease in
I
OUT
forces the
energy surplus in L to be absorbed by
C
OUT
. This
causes an overshoot in output voltage that is
corrected by the reduced duty cycle of the power
switch. Use the following equation to calculate
C
OUT
:
×
=
Vos
Where:
L is the output inductance
I
2
is the step load high current
I
1 is the step load low current
Vos is output voltage including overshoot
V
OUT
is steady state output voltage
Output voltage undershoot calculation is more
complicated. Test results for SP6127 buck
circuits show that undershoot is approximately
equal to overshoot. Therefore the above equation
provides a satisfactory method for calculating
C
OUT
.
Select ESR such that output voltage ripple (V
RIP
)
specification is met. There are two components to
V
RIP
: The first component arises from charge
transferred to and from C
OUT
during each cycle.
The second component of V
RIP
is due to inductor
ripple current flowing
capacitor’s ESR. It can be calculated from:
-
2
2
Vout
1
2
I
I
L
Cout
through the
output
2
2
8
1
×
×
+
×
=
fs
Cout
ESR
Irip
Vrip
Where:
I
RIP
is inductor ripple current
f
s is switching frequency
C
OUT
is output capacitor calculated above
Note that a smaller inductor results in a higher
I
RIP
, therefore requiring a larger
C
OUT
and/or
lower ESR in order to meet
V
RIP
.
Input Capacitor Selection
Select
the
input
capacitor
Capacitance, ripple current, ESR and ESL.
Voltage rating is nominally selected to be twice
the input voltage. The RMS value of the input
capacitor current, assuming a low inductor ripple
current (
I
RIP
), can be calculated from:
Iout
Icin
×
=
for
Voltage,
(
)
D
D
1
In general, total input voltage ripple should be
kept below 1.5% of V
IN
(not to exceed 180mV).
Input voltage ripple has three components: ESR
and ESL cause a step voltage drop upon turn on
of the MOSFET. During on time, the capacitor
discharges linearly as it supplies
I
OUT
-I
IN
. The
contribution to Input voltage ripple by each term
can be calculated from:
Vout
Iout
Cin
V
=
(
×
)
2
,
Vin
Cin
fs
Vout
Vin
×
(
(
×
×
)
Irip
Iout
ESR
ESR
V
5
,
=
)
Trise
Irip
Iout
ESL
ESL
V
5
,
=
Where T
RISE
is the rise time of current through
capacitor
Total input voltage ripple is sum of the above:
Cin
V
Tot
V
,
,
+
=
In circuits where converter input voltage is
applied via a mechanical switch, excessive
ringing may be present at turn-on that may
interfere with smooth startup of the SP6127. The
addition of an inexpensive 100
μ
F Aluminum
Electrolytic capacitor at the input will help reduce
ringing and restore a smooth startup.
ESL
V
ESR
V
,
,
+