參數(shù)資料
型號: SP6265
英文描述: Dual Low-Dropout CMOS Voltage Regulator
中文描述: 雙低壓差CMOS電壓穩(wěn)壓器
文件頁數(shù): 3/13頁
文件大?。?/td> 437K
代理商: SP6265
Mar2-07 Rev O SP6265 Dual Low-Dropout CMOS Voltage Regulator 2007 Sipex Corporation
Parameter
Symbol
Min
Typ
Max
Units
Input Supply Voltage
V
IN
Note
5.5
V
Quiescent Current
I
Q
70
60
μ
A
-.5
.5
T
J
=25
o
C
-0.2
0.2
T
J
=-0
o
C to +25
o
C -0.25
T
J
= 0
o
C to +25
o
C -0.005 +0.0025 0.005 %/mA
0.25
Load Regulation
REG
LOAD
mA<I
OUT
Current Limit
I
LIM
80
600
Short Circuit Current
I
SC
200
50
55
55
8
550
μ
V
RMS
5.5
μ
V/
H
Z
V
EH
V
IN
=2.V to 5.5V
2.
V
V
EL
I
EL
V
IN
=2.V to 5.5V
0.
V
EN=0V
I
EH
EN=5V
Shutdown Current
I
SHDN
0.
Start-Up Rise Time
.25
ms
Over Temperature Shutdown
OTS
50
o
C
Over Temperature Hysteresis
OTH
20
o
C
OUT1, OUT2
C
BYP
=0nF
BYP
f=0kH
Z
, C
BYP
=0nF, I
OUT
=mA
f=kHz to 00kHz
C
BYP
=0nF, C
OUT
=
μ
F
f=kHz to 00kHz
C
BYP
=0nF, C
OUT
=
μ
F
en1, en2
Enable Input Threshold
Test Condition
I
OUT
=mA
in
V
OUT
T
J
= 0
o
C to +25
o
C
Output Voltage
V
O
%/V
Line Regulation
REG
LINE
V
OUT
+V<V
IN
<5.5V,
I
OUT
=mA
Over Temperature Protection
dB
Output Voltage Noise
Ripple Rejection
f=00H
Z
, C
BYP
=0nF, I
OUT
=mA
f=kH
Z
, C
BYP
=0nF, I
OUT
=mA
V
IN
=5.0V
-
0.5
μ
A
V
IN
=5.0V, EN=EN2=0V
PSRR
0mA<I
OUT
<=50mA
V
OUT
+V<V
IN
<5.5V
Each Channel
mA
e
n
-2
2
%
Dropout Voltage
V
DROP
T
J
=-0
o
C to +25
o
C
50
I
OUT
=I
OUT2
=50mA
V
O
=V
O(NOM)
-2%,
V
O(NOM)
<2.5V
I
OUT
=I
OUT2
=50mA
EN Input Bias Current
T
J
= 0
o
C to +25
o
C
V
O
=V
O(NOM)
-2%,
V
O(NOM)
>=2.5V
mV
00
mV
Note: V
IN(min)
= V
OUT2
+ V
Dropout
electrical Specifications
Unless specified: T
=25
O
C, V
IN
=Higher V
OUT
+V, I
OUT
=I
OUT2
=mA, C
IN
=C
OUT
=.0
μ
F, V
EN
=V
EN2
=V
IN
Typical values are at T
J
=25
O
C
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