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參數(shù)資料
| 型號： | SP6337EK1-L-Y-B-A/TR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | LEAD FREE, MO-193BA, TSOT-8 |
| 文件頁數(shù)： | 29/33頁 |
| 文件大?。?/td> | 1431K |
| 代理商： | SP6337EK1-L-Y-B-A/TR |
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Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple Power Supervisory Circuit
2007 Sipex Corporation
5
PIN DESCRIPTION
Pin #
Name
Description
1
V1
First supply voltage input. Also powers internal circuitry. Trip threshold
voltage is internally set.
2
V2
Second supply voltage input. Trip threshold voltage internally set.
3
PFI
Power Fail Input pin. Trip threshold is 0.5V. When the input voltage at
the PFI pin is <0.5V, PFOB is low. Connect to GND or V1 if not used.
4
V3
Input for the third supply voltage. Trip threshold is 0.5V.
5
PFOB
Power Fail Output pin. Active low open drain output. When the input
voltage at the PFI pin is <0.5V, PFOB is low.
6
GND
Common ground reference pin.
7
WDI
Watch-Dog Input pin. When no transition is detected at the WDI pin for
the duration of WDI timeout period, reset is asserted. Leave open if not
used. RST/RSTB output is used to signal watchdog timeout overflow,
and its output pulses high/low (depending on the active reset polarity)
for the reset timeout period after each watchdog timeout overflow. The
watchdog timer clears whenever the reset is asserted or manual reset
is asserted or a transition is observed at WDI pin. Watchdog timer
functionality can be disabled by leaving this input floating.
8
RST/RSTB
Reset output. Open-Drain or CMOS, active high or low. Reset is
asserted when any of the t
hree supply inputs is below its trip threshold.
It stays asserted for 200 ms (typical / default) after the last supply input
traverses its trip threshold. Reset is guaranteed to be in the correct
state for V1>0.9V. RST/RSTB asserts when V1 or V2 or V3 drop below
their corresponding reset thresholds, or the watchdog timer triggers a
reset. RST/RSTB remains asserted for the reset timeout period after
V1 and V2 and V3 exceed their corresponding reset thresholds. Open-
drain outputs require an external pull-up resistor. CMOS outputs are
referenced to V1.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP6338EK1-L-R-J-A/TR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| SP6338EK1-L-S-A-C/TR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| SP6338EK1-L-S-C-D/TR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| SP6338EK1-L-T-B-A/TR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| SP6338EK1-L-T-E-A | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP6339 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Triple レPower Supervisory Circuit with Manual Reset and Watchdog |
| SP6339EK1-L-W-G-C | 功能描述:監(jiān)控電路 Triple Micropower w/ Manual Reset&Watchdg RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP6339EK1-L-Z-J-C | 功能描述:監(jiān)控電路 Quad microPower 監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP6339EK1-L-Z-J-C/TR | 功能描述:監(jiān)控電路 Triple Micropower w/ Manual Reset&Watchdg RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP6341 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Triple レPower Supervisory Circuit with Manual Reset and Watchdog |
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