參數(shù)資料
型號(hào): SP6680
英文描述: High Efficiency Charge Pump Regulator(高效電荷泵穩(wěn)壓器)
中文描述: 高效電荷泵穩(wěn)壓器(高效電荷泵穩(wěn)壓器)
文件頁數(shù): 6/12頁
文件大小: 176K
代理商: SP6680
6
Rev. 1/29/01
SP6680 High Efficiency Buck/Boost Charge Pump Regulator Copyright 2001 Sipex Corporation
4) The Clock Phase Control accepts the clock
and mode control generated by the Clock Manager
and the Charge Pump Switch Configuration
Control. This block then provides several clock
phases going to the Drivers block.
5) The V
Control regulates the Clock Phase
Control to ensure V
OUT
does not exceed +6.0V.
6) The Drivers block drives the clock phase
information to the gates of the large pump
transistors.
7) The Charge Pump Switch block contains the
large transistors that transfer charge to the fly
and load capacitors.
In normal operation of the device V
is connected
between +2.7 and 6.3V. Refer to Figure 2 for a
typical application circuit. When no clock is
present (CLK is floating or near ground) the
device is in shutdown and the output is connected
to the input. This shutdown feature will work
either in start up or after the device is pumping.
Once a clock is present, the band gap is activated,
but only if V
> 2.3V. Otherwise the device
remains in shutdown mode. Once the reference
voltage is stable, the device begins the pumping
operation.
If V
< 3.70V, the device is configured as a
doubler. However, if the output approaches
5.8V, the doubler action is truncated.
If V
is above 3.70V, the device is reconfigured
and multiplies the input by a factor of 1.5. This
mode reduces the current drawn from the supply
and hence increases the power efficiency. If the
output approaches 5.8V again, the charge transfer
to the load capacitor is truncated.
APPLICATION INFORMATION
Refer to Figure 3 for a typical SIM card
application circuit with the SP6680.
Oscillator Control
The external clock frequency required to drive
the internal charge pump oscillator is 32.768kHz
(nominal) at the CLK pin. When there is no
clock signal present at the CLK pin, the SP6680
device is in a low-power shutdown mode.
C/4 and Cx8 are two control lines for the internal
charge pump oscillator. When the C/4 control
line is forced to a logic high and the Cx8 control
line is at a low, the internal charge pump oscillator
is set to 8.192kHz. When both the C/4 and Cx8
control lines are at a logic low, the internal
charge pump oscillator is set to the input clock
signal, 32.768kHz. When the C/4 control line is
forced to a logic high, the internal charge pump
oscillator is set to 262.14kHz.
Figure 2. Typical Application for the SP6680
CF1P
V
IN
CF1N
GND
SP6680
5
3
2
1
4
C
IN
= 4.7
μ
F
C
OUT
= 2.2
μ
F
V
OUT
CF1 = 2.2
μ
F
C/4
Cx8
Frequency
Control
Inputs
CF2N
CF2P
CLK
10
9
8
7
6
CF2 = 2.2
μ
F
Input Clock
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