5
Date: 5/5/04
SP6682 High Efficiency Charge Pump Regulator for White LEDs Copyright 2004 Sipex Corporation
0
1
2
3
4
5
6
2.7
3
3.3
3.6
3.9
4.2
Input Voltage (V)
B
4 LED's @ 30mA
4 LED's @ 15mA
PERFORMANCE CHARACTERISTICS: Continued
Refer to the typical application circuit, T
AMB
= 25
°
C, I
O
= 60mA unless otherwise specified.
0
1
2
3
0
20
40
60
80
100
Duty Cycle,%
B
100 Hz
500 Hz
General Overview
The SP6682 is a current regulated charge pump
ideal for converting a Li-Ion battery input for
driving white LEDs used in backlighting color
displays in cellular phones, PDAs, digital cam-
eras and MP3 players. The SP6682’s propri-
etary AutoBoost feature enables the IC to auto-
matically transition from X1.5 boost mode to
X2 boost mode based on battery input voltage
for optimal efficiency and performance. The
SP6682 is able to efficiently drive up to six
20mA white LEDs in parallel and maintain a
constant brightness over a very wide operating
voltage range (2.7V to 5.5V). The SP6682 oper-
ates with an internal 600kHz clock, enabling the
use of small external components. Other fea-
tures of SP6682 include PWM dimming control
as well as complete input/out disconnect in
shutdown. In shut down mode the IC draws less
than 1.5
μ
A current. The output regulation is
achieved by sensing the voltage at the feedback
pin and modulating the switcher between the
charge pump and output capacitor.
Theory of Operation
The SP6682 regulated charge pump block dia-
gram consists of four main blocks (Voltage
Reference, Mode Control, Clock Manager, Start-
up and Charge-Pump Switches) and two com-
parators (V
MODE
Comparator and V
OUT
Com-
parator).
1) Voltage Reference.
This block provides the
306mV and 1.25V reference voltages needed
for the two comparators.
2) Mode Control.
An external voltage divider
connected to the V
MODE
pin will define an input
voltage to the mode comparator which sets the
logic state of the mode selection outputs to the
X2 or X1.5 modes. V
MODE
is compared to a
1.25V bandgap voltage. For example, if one
makes a 158K/100K divider, the mode will
change at 2.58 x 1.25 V =3.23V. A comparator-
based cycle by cycle regulation ensures that no
mode change occurs during cycles.
3) Clock Manager.
An internal 600 kHz clock
is generated in this block. Depending on the
mode control, the appropriate clock phasing is
generated here and sent to the start-up and
charge-pump switches block.
4) Start-up and Charge Pump Switches.
Dur-
ing start-up, until the reference is established,
this block keeps the charge pump inactive. Dur-
ing this period the output stays floating, by
consequence the charge pump drivers are now
referenced to V
OUT
. Charging of the output will
occur (e.g. when V
IN
is ramped up to 4.2V, V
OUT
ramps only up to about 3V), but not to the value
of V
IN
, protecting the White LED from experi-
Figure 7. Brightness vs. input voltage
Figure 8. Brightness vs duty cycle
OPERATION