參數(shù)資料
型號: SP691A
英文描述: Low Power Microprocessor Supervisory with Battery Switch-Over(低功耗,微處理器監(jiān)控電路(帶電池開關(guān)))
中文描述: 低功耗微處理器監(jiān)控與電池開關(guān)過(低功耗,微處理器監(jiān)控電路(帶電池開關(guān)))
文件頁數(shù): 11/23頁
文件大?。?/td> 223K
代理商: SP691A
SP691A DS/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over Copyright 2000 Sipex Corporation
11
10k
and the output saturation voltage is below
0.4V while sinking 40
μ
A. When using a 10k
external pull-down resistor, the high state for
the RESET output with Vcc = 4.75V is 4.5V
typical. For battery voltages less than or equal
to 2V connected to V
BATT
, RESET and RESET
remains valid for V
CC
from 0V to 5.5V.
RESET and RESET are asserted when V
falls
below the reset threshold and remain asserted
for the Reset Timeout Period (200ms nominal)
after V
rises above the reset threshold voltage
on power-up. Refer to
Figure 19
. The devices'
battery-switchover comparator does not affect
reset assertion. However, both reset outputs are
asserted in battery-backup mode since V
must
be below the reset threshold to enter this mode.
Figure 18. External Pull-down Resistor Ensures
RESET is Valid with V
CC
Down to Ground.
TO
μ
P RESET
10k
15
Corporation
RESET
Figure 19. Reset and Chip-Enable Timing
4) Watchdog function
Monitors
μ
P activity
where the watchdog output goes to a logic
LOW state if the watchdog input is not
toggled for greater than the timeout period.
5) Internal switch
Switches over from V
to V
if the V
CC
falls below the reset
threshold.
RESET and RESET Outputs
The
SP691A/693A/800L/800M
devices'
RESET and RESET outputs ensure that the
μ
P
powers up in a known state, and prevents
code-execution errors during power-down or
brownout conditions.
The RESET output is active low, and typically
sinks 3.2mA at 0.1V saturation voltage in its
active state. When deasserted, RESET sources
1.6mA at typically V
OUT
– 0.5V. RESET output
is open drain, active high, and typically sinks
3.2mA with a saturation voltage of 0.1V. When
no backup battery is used, RESET output is
guaranteed to be valid down to V
CC
= 1V, and
an external 10k
pull-down resistor on RESET
ensures that RESET will be valid with V
CC
down to GND as shown on
Figure 18
. As V
CC
goes below 1V, the gate drive to the RESET
output switch reduces accordingly, increasing
the R
(ON) and the saturation voltage. The
10k
pull-down resistor ensures the parallel
combination of switch plus resistor is around
Vcc
CE
IN
CE
OUT
RESET
12
μ
100
μ
s
100
μ
s
RESET
THRESHOLD
RESET
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