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參數(shù)資料
| 型號： | SP705CP |
| 英文描述： | Low Power Microprocessor Supervisory Circuits |
| 中文描述： | 低功耗微處理器監(jiān)控電路 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大小： | 197K |
| 代理商： | SP705CP |
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
Copyright 2000 Sipex Corporation
12
sensitivity to high-frequency noise on the
line being monitored. RESET can be used to
monitor voltages other than the +5V V
CC
line. Connect PFO to MR to initiate a RESET
pulse when PFI drops below 1.25V.
Figure 17
shows the
SP705/706/707/708
configured to
assert RESET when the +5V supply falls below
the RESET threshold, or when the +12V supply
falls below approximately 11V.
Monitoring a Negative Voltage Supply
The power-fail comparator can also monitor a
negative supply rail, shown in
Figure 18
. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
the
SP705-708/813L/813M
will keep RESET
asserted (where RESET = LOW and RESET =
HIGH). Note that this circuit's accuracy de-
pends on the PFI threshold tolerance, the V
CC
line, and the resistors.
Figure 18. Monitoring a Negative Voltage Supply
Figure 19. Interfacing to Microprocessors with
Bidirectional RESET I/O for the SP705/706/707/708
Interfacing to mPs with Bidirectional
RESET Pins
μ
Ps with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708
RESET output. If, for
example, the RESET output is driven HIGH and
the
μ
P wants to pull it LOW, indeterminate
logic levels may result. To correct this, connect
a 4.7K
resistor between the RESET output and
the
μ
P reset I/O, as shown if
Figure 19
. Buffer
the RESET output to other system components.
V
CC
+5V
GND
V
CC
+5V
GND
RESET
RESET
4.7K
μ
P
Buffered RESET connects to System Components
PFI
PFO
R
2
R
1
V
CC
+5V
GND
PFO
V-
+5V
V
TRIP
0V
0V
5.0 - 1.25
1.25 - V
TRIP
R
1
R
2
V-
=
100K
100K
RESET
to
μ
P
2N3904
, V
TRIP
< 0
V-
MR
0V
+5V
MR
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PDF描述 |
|---|---|
| SP705CU | Low Power Microprocessor Supervisory Circuits |
| SP828 | High Efficiency Voltage Inverters |
| SP828EK | High Efficiency Voltage Inverters |
| SP829 | High Efficiency Voltage Inverters |
| SP829EK | High Efficiency Voltage Inverters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP705CP-L | 制造商:Exar Corporation 功能描述: |
| SP705CP-L/TR | 制造商:EXAR 制造商全稱:EXAR 功能描述:Low Power Microprocessor Supervisory Circuits |
| SP705CU | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory Circuits |
| SP705CU-L | 功能描述:監(jiān)控電路 LOW PWR MICROPROCESSOR RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP705CU-L/TR | 功能描述:監(jiān)控電路 LOW PWR MICROPROCESSOR RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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