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參數(shù)資料
| 型號： | SP7653 |
| 英文描述： | Wide Input Voltage Range, 1.3MHz,Buck Regulator |
| 中文描述： | 寬輸入電壓范圍，1.3MHz，降壓穩(wěn)壓器 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 207K |
| 代理商： | SP7653 |
4
Date: 03/25/05
SP7653 Wide Input Voltage Range, 1.3MHz, Buck Regulator Copyright 2005 Sipex Corporation
General Overview
The SP7653 is a fixed frequency, voltage mode,
synchronous PWM regulator optimized for high
efficiency. The part has been designed to be
especially attractive for high input voltages of
2.5V to 20V.
The heart of the SP7653 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference, present on
the positive terminal of the error amplifier per-
mits the programming of the output voltage
down to 0.8V via the V
FB
pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp, and
PWM control logic are governed by the internal
oscillator that accurately sets the PWM fre-
quency to 1.3MHz.
THEORY OF OPERATION
The SP7653 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during start up, to prohibit the low side
switch from pulling down the output until the
high side switch has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side switch is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the Boost
capacitor during very large duty ratios.
The SP7653 also contains a number of valuable
protection features. Programmable V
IN
UVLO
allows the user to set the exact value at which the
conversion voltage can safely begin down con-
version, and an internal V
CC
UVLO which en-
sures that the controller itself has enough volt-
age to properly operate. Other protection fea-
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