4
Rev. 5/19/03
SP78LC00 100mA CMOS LDO Regulator
Copyright 2003 Sipex Corporation
General Overview
The SP78LC00 is a CMOS LDO designed to
meet a broad range of applications that re-
quire accuracy, speed and ease of use. This
LDO offers extremely low quiescent current
which only increases slightly under load, thus
providing advantages in ground current per-
formance over bipolar LDOs. The LDO
handles an extremely wide load range and
guarantee stability with a 1
μ
F ceramic output
capacitor. It has excellent low frequency
PSRR, not found in other CMOS LDOs and
thus offer exceptional Line Regulation. High
frequency PSRR is better than 40dB up to
400kHz. Load Regulation is excellent and
temperature stability is comparable to bipolar
LDOs. Thus, overall system accuracy is main-
tained under all DC and AC conditions. Cur-
rent Limit and Thermal protection is provided
internally and is well controlled.
Architecture
The SP78LC00 has a current limit of 150mA.
The LDO has a two stage amplifier which
handles an extremely wide load range (10
μ
A
to 100mA) and guarantees stability with a
1
μ
F ceramic load capacitor. The LDO ampli-
fier has excellent gain and thus touts PSRR
performance not found in other CMOS LDOs.
The amplifier guarantees no overshoot on
power up. The amplifier also contains an ac-
tive pull down, so that when the load is re-
moved quickly the output voltage transient is
minimal; thus output deviation due to load
transient is small and fairly well matched
when connecting and disconnecting the load.
An accurate 1.250V bandgap reference is
bootstrapped to the output. This increases
both the low frequency and high frequency
PSRR. Unlike many LDOs, the bandgap ref-
erence is not brought out for filtering by the
user. This tradeoff was maid to maintain good
PSRR at high frequency (PSRR can be de-
graded in a system due to switching noise
coupling into this pin). Also, often leakages
of the bypass capacitor or other components
cause an error on this high impedance bandgap
node. Thus, this tradeoff has been made with
"ease of use" in mind.
Protection
Current limit behavior is very well controlled,
providing less than 10% variation in the cur-
rent limit threshold over the entire tempera-
ture range of the SP78LC00. The SP78LC00
has a current limit of 150mA. Thermal shut-
down activates at 162
°
C and deactivates at
147
°
C. Thermal shutdown is very repeatable
with only a 2 to 3 degree variation from device
to device. Thermal shutdown changes by only
1 to 2 degrees with Vin change from 4V to 7V.
Input Capacitor
A small capacitor, 1
μ
F or higher, is required
from V
IN
to GND to create a high frequency
bypass for the LDO amplifier. Any ceramic or
tantalum capacitor may be used at the input.
Capacitor ESR (effective series resistance)
should be smaller than 3
.
Output Capacitor
An output capacitor is required between V
OUT
and GND to prevent oscillation. A capaci-
tance as low as 0.22
μ
F can fulfill stability
requirements in most applications. A 1
μ
F
capacitor will ensure unconditional stability
from no load to full load over the entire input
voltage, output voltage and temperature range.
Larger capacitor values improve the regulator's
transient response. The output capacitor value
may be increased without limit. The output
capacitor should have an ESR (effective se-
ries resistance) below 5
and a resonant fre-
quency above 1MHz.
No Load Stability
The SP78LC00 will remain stable and in regu-
lation with no external load (other than the
internal voltage driver) unlike many other
voltage regulators. This is especially impor-
tant in CMOS RAM keep-alive applications.
Thermal Considerations
The SP78LC00 is designed to provide 100mA
of continuous current. Maximum power dissi-
pation can be calculated based on the output
current and the voltage drop across the part.
To determine the maximum power dissipa-
THEORY OF OPERATION