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參數(shù)資料
| 型號(hào)： | SP800MCT |
| 英文描述： | Low Power Microprocessor Supervisory with Battery Switch-Over |
| 中文描述： | 低功耗微處理器監(jiān)控與電池開關(guān)過 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 196K |
| 代理商： | SP800MCT |
Date: 5/25/04 SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over Copyright 2004 Sipex Corporation
18
PFI
PFO
R
2
R
1
V
CC
+5V
GND
PFO
V-
+5V
*V
TRIP
0V
0V
V-
*V
TRIP
is a negative voltage
5.0 - 1.25
R
1
1.25 - V
TRIP
R
2
=
Figure 28. Monitoring a Negative Voltage
Negative-Going V
CC
Transients
While asserting resets to the
μ
P during power-up,
power-down, and brownout conditions, these
supervisors are relatively immune to short-
duration negative-going V
CC
transients. It is
usually undesirable to reset the
μ
P when V
CC
experiences only small glitches.
Refer to
Figure 29
for a graph of the maximum
transient duration vs. the reset-comparator over-
drive for which reset pulses are not generated.
The graph was produced using negative-going
pulses, starting at 5V and ending below the
reset threshold by the magnitude indicated
(reset comparator overdrive). The graph shows
the maximum pulse width a negative-going V
CC
transient may typically have without causing a
reset pulse to be issued.
As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the
maximum allowable pulse width decreases.
Typically, a V
CC
transient that goes 100mV
below the reset threshold and lasts for 40
μ
s or
less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the
V
CC
pin provides additional transient immunity.
Connecting a Timing Capacitor to OSC
IN
When OSC
is connected to ground, OSC
IN
disconnects from its internal 10
μ
A pull-up and
is internally connected to a +100nA current
source. When a capacitor is connected from
OSC
to ground (to select an alternative
watchdog timeout period), the current source
charges and discharges the timing capacitor to
create the oscillator that controls the reset and
watchdog timeout period. To prevent timing
errors, minimize external current leakage
sources at this pin, and locate the capacitor as
close to OSC
as possible. The sum of any PC
board leakage plus the OSC capacitor leakage
must be small compared to +100nA.
Figure 29. Maximum Transient Duration Without
Causing a Reset Pulse vs. Reset Comparator Overdrive
Reset Comparator Overdrive
(Reset Threshold Voltage - V
CC
), (mV)
1 10 1000 10000
M
D
μ
s
160
120
80
40
0
0.1
μ
F Capacitor
V
OUT
to GND
Above Line
Reset Generated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP800MCT/TR | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP800MEN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP800MEN/TR | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP800MEP | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP800MET | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Low Power Microprocessor Supervisory with Battery Switch-Over |
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