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參數(shù)資料
| 型號(hào)： | SP805TCP |
| 英文描述： | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| 中文描述： | 3.0V/3.3V低功耗微處理器監(jiān)控與電池開關(guān)過(guò) |
| 文件頁(yè)數(shù)： | 16/20頁(yè) |
| 文件大?。?/td> | 233K |
| 代理商： | SP805TCP |
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SP690T/S/R DS/10 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
Copyright 2000 Sipex Corporation
16
Figure 24. Interfacing to Microprocessors with
Bidirectional RESET I/O
V
CC
GND
V
CC
GND
RESET
RESET
4.7K
μ
P
Buffered RESET connects to System Components
Monitoring an Additional Power Supply
These
μ
P supervisors can monitor either positive
or negative supplies using a resistor voltage
divider to PFI. PFO can be used to generate an
interrupt to the
μ
P, as seen in
Figure 23
.
Interfacing to
μ
Ps with Bidirectional
Reset Pins
Any
μ
Ps with bidirectional reset pins, such as
the Motorola 68HC11 series, can interface with
the
SP690_
and the
SP802_
RESET outputs.
For example, if the RESET output is driven
HIGH and the
μ
P wants to pull it LOW,
indeterminate logic levels may result. To correct
this, connect a 4.7k
resistor between the
RESET output and the
μ
P reset I/O, as in
Figure 24.
Buffer the RESET output to other
system components.
Negative-Going V
CC
Transients
While issuing resets to the
μ
P during power-up,
power-down, and brownout conditions, these
supervisors are relatively immune to short-
duration negative-going V
transients
(glitches). It is usually undesirable to reset the
μ
P when V
CC
experiences only small glitches.
Figure 25
shows maximum transient duration
vs. reset-comparator overdrive, for which reset
pulses are not generated. The data was generated
using negative-going V
pulses, starting at
3.3V and ending below the reset threshold by
the magnitude indicated (reset comparator
overdrive). The graph shows the maximum pulse
width a negative-going V
transient may
typically have without causing a reset pulse to
be issued. As the amplitude of the transient
increases (i.e. goes farther below the reset
threshold), the maximum allowable pulse width
decreases. Typically, a V
transient that goes
100mV below the reset threshold and lasts for
40
μ
s or less will not cause a reset pulse to be
issued. A 100nF bypass capacitor mounted close
to the V
CC
pin provides additional transient
immunity.
Figure 25. Maximum Transient Duration without
Causing a Reset Pulse vs. Reset Comparator Overdrive
1nF Capacitor
V
OUT
TO GND
ARESET
Generated
RNO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP805TEN | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP805TEP | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP802RCN | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP802RCP | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP802REN | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP805TEN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP805TEN-L | 功能描述:監(jiān)控電路 LW PWR MICRO 5.5V 25mA-250mA BAT SW/OV RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP805TEN-L/TR | 功能描述:監(jiān)控電路 LW PWR MICRO 5.5V 25mA-250mA BAT SW/OV RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| SP805TEP | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| SP8062 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:High Speed 10-channel Photo Detector IC |
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