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參數(shù)資料
| 型號(hào)： | SP805TEP |
| 英文描述： | 3.0V/3.3V Low Power Microprocessor Supervisory with Battery Switch-Over |
| 中文描述： | 3.0V/3.3V低功耗微處理器監(jiān)控與電池開關(guān)過 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 233K |
| 代理商： | SP805TEP |
15
SP690T/S/R DS/10 SP690T/S/R, 802/T/S/R, 804T/S/R, 805T/S/R Low Power Microprocessor Supervisory
Copyright 2000 Sipex Corporation
Connecting an ordinary signal diode in series
with R3, as in
Figure 22B
, causes the lower trip
point (V
) to coincide with the trip point without
hysteresis (V
), so the entire hysteresis
window occurs above V
. This method pro-
vides additional noise margin without compro-
mising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is
useful for accurately detecting when a voltage
falls past a threshold.
Figure 22A. Adding Additional Hysteresis to the Power-Fail Comparator.
Figure 22B. Shifting the Additional Hysteresis above V
PFT
The current through R1 and R2 should be at least
1
μ
A to ensure that the 25nA (max over extended
temperature range) PFI input current does not
shift the trip point. R3 should be larger than
10k
so it does not load down the PFO pin.
Capacitor C1 adds additional noise rejection.
Figure 23. Using the Power-Fail Comparator to Monitor an Additional Power Supply
V
IN
R1
R2
+
R3
TO
μ
P
PFI
PFO
GND
V
CC
SP690T/S/R
PFO
0V
0V
V
L
V
TRIP
V
H
V
IN
V
IN
R1
R2
+
R3
TO
μ
P
PFI
PFO
GND
V
CC
SP690T/S/R
PFO
0V
0V
V
TRIP
V
H
V
IN
*OPTIONAL
V
TRIP
= V
PFT
(
V
H
=
V
L
= R1
WHERE V
PFT
= 1.25V
V
PFH
= 10mV
R1 + R2
R2
(
)
R1
( )
R1 R2 R3
)
)
V
PFT
+ V
PFH
1 + 1 + 1
R1 R2 R3
(
)
V
PFT
[ (
1 + 1 + 1
- V
CC
R3
]
V
TRIP
= V
PFT
V
L
= R1
WHERE V
PFT
= 1.25V
V
PFH
= 10mV
V
D
= DIOD FORWARD VOLTAGE DROP
R1 + R2
R2
(
)
V
PFT
+ V
PFH
(
[
1 + 1 + 1
R1 R2 R3
)
)
- (V
CC -
V
D
)
R3
]
*C1
*C1
R1
R2
V-
PFI
PFO
GND
V
CC
SP690T/S/R
SP804T/S/R
PFO
V
L
V
TRIP
V-
V
IN
R1
R2
PFI
PFO
GND
V
CC
SP690T/S/R
SP804T/S/R
PFO
V
TRIP
V
H
V
IN
V
CC
0V
3.0V OR 3.3V
V
CC
V
TRIP
= R2
V
L
= R2
WHERE V
PFT
= 1.25V
V
PFH
= 10mV
NOTE: V
TRIP
IS NEGATIVE
V
PFT
+ V
PFH
(
R1 R2
)
)
R3
]
1 + 1
R1 R2
(
)
V
PFT
[ (
1 + 1
- V
CC
[
- V
CC
R1
]
V
TRIP
= V
PFT
(
V
H
=
R1 + R2
R2
(
)
)
V
PFT
+ V
PFH
(
R1 + R2
R2
)
A.)
B.)
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