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參數(shù)資料
| 型號： | SP8481AP |
| 英文描述： | Monolithic, 12-Bit Data Acquisition System |
| 中文描述： | 單片，12位數(shù)據(jù)采集系統(tǒng) |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 211K |
| 代理商： | SP8481AP |
304
PIN ASSIGNMENTS…
(Refer to Page 11 for package configurations and dimensions)
1
16
2
3
4
5
6
7
8
9 10 11 12 13 14 15
17
23 22 21 20 19 18
24
30 29 28 27 26 25
32 31
S
D
D
D
D
D
D
D
D
M
M
M
M
L
D
V
L
A
0
R
C
V
C
O
G
A
A
A
A
A
A
A
A
A
CONTROL
LOGIC
C
12-BIT ADC
8-CHANNEL
MULTIPLEXER
DECODE
REF
C
Table 1. Multiplexer Truth Table
MULTIPLEXER TRUTH TABLE
LATCH
MAEN MA
2
MA
1
MA
0
H -> L
0
H -> L
0
H -> L
0
H -> L
0
H -> L
0
H -> L
0
H -> L
0
H -> L
0
H -> L
1
0
X
1
X
OPERATION
CH
O
Selected
CH
1
Selected
CH
2
Selected
CH
3
Selected
CH
4
Selected
CH
5
Selected
CH
6
Selected
CH
7
Selected
All Deselected
Prev. Ch. n Held
Prev. Ch. n Held
0
0
0
0
1
1
1
1
n
X
X
0
0
1
1
0
0
1
1
n
X
X
0
1
0
1
0
1
0
1
n
X
X
PIN FUNCTION…
R/C — Read/Convert — Initiates conversion on
the Hi-to-low transition; logic low disconnects
data bus; logic high initiates read
CS — Chip Select — Logic high disconnects
data bus; logic low allows conversion or reading
of data
CE — Chip Enable — Logic low disables read or
convert; logic high enables read or convert
A
— Device Address — Logic low enables 8
MSB read; logic high enables 4 LSB read
MA
, MA
, MA
— MUX Address 0, 1 & 2 —
Selects analog input channels CH
0
through CH
7
LATCH — MUX Address Latch — Logic high
to low transition captures MUX address on MUX
address lines
MAEN — MUX Enable — Logic low allows
normal MUX address; logic high deselects CH
O
through CH
7
DB
through DB
— Data Outputs — Logic
high is binary true; logic low binary false
Table 2. Control Truth Table
CONTROL TRUTH TABLE
CE
CS
A
O
R/C
OPERATION
0
X
X
X
None
X
1
X
X
None
L->H
0
0
X
Start Conversion
1
H ->L
0
X
Start Conversion
1
0
H ->L
X
Start Conversion
1
0
1
0
Enable 8 MSBs
1
0
1
1
Enable 4 LSBs
相關PDF資料 |
PDF描述 |
|---|---|
| SP8481AS | Monolithic, 12-Bit Data Acquisition System |
| SP8481BP | Monolithic, 12-Bit Data Acquisition System |
| SP8481BS | Monolithic, 12-Bit Data Acquisition System |
| SP8481JP | Monolithic, 12-Bit Data Acquisition System |
| SP8481JS | Monolithic, 12-Bit Data Acquisition System |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SP8481AS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Monolithic, 12-Bit Data Acquisition System |
| SP8481BP | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Monolithic, 12-Bit Data Acquisition System |
| SP8481BS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Monolithic, 12-Bit Data Acquisition System |
| SP8481JP | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Monolithic, 12-Bit Data Acquisition System |
| SP8481JS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:Monolithic, 12-Bit Data Acquisition System |
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