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參數(shù)資料
| 型號： | SP8527KS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 180K |
| 代理商： | SP8527KS |
SP8527DS/01
SP8527 Micropower Sampling 10-Bit A/D Converter
Copyright 2000 Sipex Corporation
4
OBSOLETE
-
HIST
ORICAL
REFERENCE
ONL
Y
PIN ASSIGNMENTS
Pin 1- V
REF
- Reference Voltage
Pin 2- +IN - Positive Input
Pin 3- -IN - Negative Input
Pin 4- GND - Ground
Pin 5- CS/SHDN - Chip Select Bar/Shutdown
Pin 6 - D
OUT - Data Out
Pin 7- SCLK - Serial Clock
Pin 8- V
CC - Supply
PIN DESCRIPTION
VREF
+IN
-IN
GND
VCC
SCLK
DOUT
CS/SHDN
1
2
3
4
8
7
6
5
SP8527
w
SPECIFICATIONS (cont.)
Recommended Operating Conditions
VCC=5.0V
VCC=3.3V
SYMBOL
PARAMETERS
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
V
CC
Supply Voltage
+3.0
+5.0
+5.5
+3.0
+3.3
+5.5
Volts
f
CLK
Clock Frequency
500
333
kHz
t
CYC
Total Cycle Time
26.1
39.2
S
t
suCS
Setup Time CSv
100
150
nS
Before CLK^
t
WHCLK
CLK High Time
.9
1.4
S
t
WLCLK
CLK Low Time
.9
1.4
S
t
WHCS
CS High Time between
100
150
nS
Data Transfers Cycles
t
SAMPLE
S/H Acquisition Time
2
SCLK Cycles
t
CONV
ADC Conversion Time
10
SCLK Cycles
t
CLK
Clock Period
2.0
3.0
S
t
en
SCLK to D
OUT Enable
80
200
150
300
nS
t
DIS
CSN to D
OUT Hi - Z
80
200
150
200
nS
t
R
D
OUT Rise Time
5
25
10
50
nS
t
F
D
OUT Fall Time
5
25
10
50
nS
t
HDO
D
OUT Valid After SCLK
80
200
150
300
nS
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| SP8530AS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:S2ADC - Simultaneous Sampling Analog to Digital Converter |
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